Specifications

Theory of Operation
4 4
4-5
BIOS ROM and ROM Shadowing
The EPC-8 contains a Flash boot device (chip) as its BIOS ROM. The BIOS ROM is
mapped into the top of the processor's 32-bit address space. The BIOS consists of an 8
Kbytes boot block and a System BIOS combined with a VGA BIOS in a 112 Kbytes
partition. The Flash boot device is memory addressed and resides in the last 128
Kbytes of system memory at address FFFE0000H to FFFFFFFFH. The layout is
described in Figure 4-2.
FFFFFFFF Boot block
8 Kbytes
FFFFE000
Parameter block 2
FFFFD000 4 Kbytes
Parameter block 1
FFFFC000 4 Kbytes
System & VGA BIOS
112 Kbytes
FFFE0000
Figure 4-2. Flash Boot Device Memory
The BIOS initialization software copies the ROM contents into DRAM (a process
called shadowing) at addresses 0F0000-0FFFFF (also called the "F" page). The VGA
BIOS is copied into 0C0000-0C7FFF of DRAM. If the user has configured an EXM
VGA card (e.g., an EXM-13A) and enabled it, the EXM’s BIOS is used for the copy.
Otherwise, the internal VGA BIOS is copied and enabled.
After copying into these areas, the BIOS write-protects them. Subsequent writes to
these areas complete successfully but do not alter the data in DRAM. However, the
proper sequence of writes will alter data in the Flash boot device (BIOS ROM) itself,
if the jumper is installed.
There are two parameter blocks, each 4 Kbytes in size. The first parameter block is
used by the utilities program CMOSTOOL.EXE, located on the EPC-8 File/Utilities
diskette. The use of this program is discussed below. The second parameter block is
unused. Access to this memory is complex. Your should consult the Intel Memory
Products data book for details on programming parameter block 2 if this is required.
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