Specifications

EPC-3305 Hardware Reference
80
CompactPCI J1 and J2
The CompactPCI J1connector is a female 2mm-pitch 6 column by 25 row right
angle Hard Metric (HM) connector with a guide lug in the center. The CompactPCI
J2 connector is exactly the same as the J1 connector except there are only 22 rows
numbered 1
–22, and the center guide lug is eliminated. All these signals have the
standard CompactPCI revision 2.1 bus definitions.
8 PMCAIO30 PMCAIO292 PMCAIO28 PMCAIO27 PMCAIO26 GND
9 PMCAIO25 PMCAIO24 PMCAIO23 PMCAIO22 PMCAIO21 GND
10 PMCAIO20 PMCAIO19 PMCAIO18 PMCAIO17 PMCAIO16 GND
11 PMCAIO15 PMCAIO14 PMCAIO13 PMCAIO12 PMCAIO11 GND
12 PMCAIO10 PMCAIO9 PMCAIO8 PMCAIO7 PMCAIO6 GND
13 PMCAIO5 PMCAIO4 PMCAIO3 PMCAIO2 PMCAIO1 GND
14 IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4 GND
15 IDE_D5 IDE_D6 IDE_D7 IDE_D8 IDE_D9 GND
16 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 GND
17 gnd AUXVCC IDE_D15 IDE_A0 IDE_A1 GND
18 ETH1_TX– ETH1_RX– AUX_CLK ~IDE_IOR IDE_A2 GND
19 ETH1_TX+ ETH1_RX+ AUX_DAT ~IDE_IOW IDE_DREQ GND
20 GND AUXVCC ~RESET_IN IDE_ORDY ~IDE_CS3 GND
21 ETH0_TX– ETH0_RX– KBD_CLK ~IDE_DACK~IDE_CS1 GND
22 ETH0_TX+ ETH0_RX+ KBD_DAT IDE_INTR !IDE_RSTDRV GND
Table C-2. Backplane connector J5
Pin A B C D E F
Table C-3. Compact PCI J1 connector
Pin A B C D E
F
8
15V –12V
~TRST
13
+12V 5V GND
2
TCK
13
5V
TMS
14
TDO
14
TDI
14
GND
3 ~INTA ~INTB ~INTC 5V ~INTD GND
4 NC GND V(I/O) INTP INTS GND
5
BRSV
11
BRSV
11
~RST GND ~GNT GND
6 ~REQ GND 3.3V CLK AD[31] GND
7 AD[30] AD[29] AD[28] GND AD[27] GND
8 AD[26] GND V(I/O) AD[25] AD[24] GND
9 ~C/BE[3] IDSEL AD[23] GND AD[22] GND
10 AD[21] GND 3.3V AD[20] AD[19] GND
11 AD[18] AD[17] AD[16] GND C/~BE[2] GND
12–14 Key Area
15 3.3V ~FRAME ~IRDY
~BD_SEL
7
~TRDY GND