Specifications

Chapter 4: Theory of operation

When exiting a CPU reset condition, the BIOS or application software can check the

Reset Event Register to determine the source of the reset.

WD_EN Enables watchdog timer.

0 (zero) Disables the watchdog timer.

1 Enables the watchdog timer.

SEL0, 1, 2 Selects watchdog timeout value:

Front panel red/green LED

The CPU has one dual-color, user-controllable LED on the front panel. The colors

are red and green. A one written to this register illuminates the LED. Both colors

can be illuminated simultaneously.

G_LED Determines the green LED’s state:

0 (zero) The LED remains unlit.

1 Illuminates the LED.

R_LED Determines the red LED’s state:

0 (zero) The LED remains unlit.

1 Illuminates the LED.

Local interrupt control register

The EPC205 Special Features CPLD controls several interrupts and the CPU INIT

signal. The Local Interrupt Control register enables or disables these signals. The

Table 4-7. Watchdog control register

R/W Index Default D7 D6 D5 D4 D3 D2 D1 D0

R/W 0x01 0x00 WD_EN ———FP SEL2 SEL1 SEL0

Timeout SEL2 SEL1 SEL0

0.5s 0 0 0

1s 001

8s 010

32s 0 1 1

64s (1 min) 1 0 0

258s (4min) 1 0 1

rsvd 110

rsvd 111

Table 4-8. Front panel user LED control

R/W Index Default D7 D6 D5 D4 D3 D2 D1 D0

R/W 0x03 0x00 ——————G_LED R_LED