Specifications

Chapter 4: Theory of operation

controller also generates the ISA refresh cycles. The DMA controller supports

two separate methods for handling legacy DMA via the PCI bus:

• PC/PCI protocol: Allows PCI-based peripherals to initiate DMA cycles by

encoding requests and grants via three PC/PCI ~REQ/~GNT pairs.

• Distributed DMA: Allows PCI devices to receive reads and writes to 82C37

registers. The DMA controller also provides support for the serial interrupt

scheme typically associated with Distributed DMA.

• Timer/counters: The timer/counter block contains three counters that are

equivalent in function to those found in one 82C54 programmable interval

timer. The timer/counter block provides the system timer function, refresh

request, and speaker tone. The 14.31818 MHz oscillator input provides the

clock source for these three counters.

• Interrupt controller: The ISA-compatible interrupt controller incorporates the

functionality of two 82C59 interrupt controllers. Cascading of the interrupt

controllers provides 14 external and two internal interrupts. Additionally,

PIIX4E supports a serial interrupt scheme.

All registers in these modules can be read and restored. This allows saving and

restoring the system state after removing power and restoring it to the circuit.

Enhanced USB controller

The PIIX4E USB controller provides enhanced support for the Universal Host

Controller Interface (UHCI). This includes support that allows legacy software to

use a USB-based keyboard and mouse. When enabled, the USB controller uses

PIRQD. The USB ports are routed to CompactPCI Backplane connector J3.

SMBus interface and implementation

The PIIX4E SMBus interface allows the CPU to communicate via SMBus to other

peripherals. The SMBus is a subset of the I2C protocol.

RTC

The real-time clock (RTC):

• Keeps track of time of day by counting seconds, minutes, hours, days, day of the

week, date, month, and year with leap year compensation. Daylight savings

compensation is optional.

• Provides a time-of-day alarm with once a second to once a month range,

periodic rates of 122 ms to 500 ms, and end-of-update cycle notification.

• Stores system data including during a system power-down via battery backed-

up operation.

The PIIX4E RTC is Motorola MC146818 RTC compatible with 256 bytes battery

backed RAM in two banks:

• Standard bank: Contains 10 bytes indicating time and date information, 4 bytes

used as four Control Register (A,B,C,D), and 114 bytes used as general

purpose RAM.