Specifications

EPC-3305 Hardware Reference
46
The Plug-and-Play ESCD is also stored in the Boot-Block FLASH device in the block
addressed from FFFFA000h–FFFFBFFFh. This block is always accessible for
re-programming.
A “forced recovery” jumper is provided and is connected to the G-PI2O of the
PIIX4. The Boot Block can read this jumper and can force a recovery sequence at
power-up should other methods of initiating the sequence, such as crisis recovery,
become inaccessible.
The Flash BIOS device is memory addressed and resides in the last 512 KB of system
memory at address FFF80000h–FFFFFFFFh.
BIOS ROM and ROM shadowing
The EPC-3305 utilizes a Flash Boot Device (FBD) as its BIOS ROM. The BIOS
ROM is mapped into the top of the processor's 32-bit address space. The BIOS
consists of a 16 KByte boot block and the System BIOS in the 96KB Main block and
both 8KB parameter blocks. The layout is described in the next figure.
Use extreme caution when re-programming the flash chip. The Boot Block
rarely changes and should not require re-programming. For information
about re-programming the Flash chip, see Appendix F, Re-programming the
flash chip.
Physical address Device offset
FFFFFFFFh
FFFFC000h
16 KB
BIOS Recovery Code
FFFFFh
FC000h
FFFFBFFFh
FFFFA000h
8 KB Parameter Block 2
ESCD
FBFFFh
FA000h
FFFF9FFFh
FFFF8000h
8 KB Parameter Block 1 F9FFFh
F8000h
FFFF7FFFh
FFFE0000h
FFFDFFFFh
FFFC0000h
96 KB Main Block 8
System BIOS, PCI BIOS,
Plug n Play BIOS
Manufacturing BIOS
128 KB Main Block 7
F7FFFh
E0000h
DFFFFh
C0000h
FFFBFFFFh
FFFA0000h
128 KB Main Block 6
User Extensions (128KB)
BFFFFh
A0000h
FFF9FFFFh
FFF80000h
128 KB Main Block 5
CSR/CMOS data
9FFFFh
80000h
Figure 4-2. Flash boot device memory