Specifications

EPC-3305 Hardware Reference
viii
Figures
Figure 1-1. The EPC-3305....................................................................................................................... 1.
Figure 2-1. EPC-3305 CPU board: jumper locations ............................................................................... 6.
Figure 2-2. Flash header settings ............................................................................................................. 6.
Figure 2-3. Replacing the battery ............................................................................................................ 8.
Figure 3-1. BIOS Main Setup menu......................................................................................................... 13.
Figure 3-2. Primary/Secondary Master/Slave sub-menus.......................................................................... 15.
Figure 3-3. Keyboard Features sub-menu ................................................................................................ 19.
Figure 3-4. UBE Shadow Control sub-menu............................................................................................ 21.
Figure 3-5. Advanced menu..................................................................................................................... 23.
Figure 3-6. Console Redirection sub-menu.............................................................................................. 26.
Figure 3-7. I/O Device Configuration sub-menu...................................................................................... 28.
Figure 3-8. PCI Device Configuration sub-menu ..................................................................................... 30.
Figure 3-9. PCI/PNP ISA UMB Region Exclusion sub-menu ................................................................... 31.
Figure 3-10. PCI/PNP ISA IRQ Resource Exclusion sub-menu ................................................................ 32.
Figure 3-11. Cache Memory sub-menu ................................................................................................... 33.
Figure 3-12. Advanced Chipset Control sub-menu ..................................................................................38.
Figure 3-13. Boot menu........................................................................................................................... 39.
Figure 3-14. Exit menu............................................................................................................................ 40.
Figure 3-15. CMOS Save and Restore sub-menu.....................................................................................42.
Figure 4-1. Block diagram of the EPC-3305 ............................................................................................ 44.
Figure 4-2. Flash boot device memory..................................................................................................... 46.
Figure 4-2. BIOS paging .......................................................................................................................... 62.
Figure C-1. EPC-3305 Main board: connectors....................................................................................... 78.
Figure E-1. EPC-3305 Rear Transition module: connectors..................................................................... 90.
Figure F-1. Flash chip configuration........................................................................................................ 99.
Figure F-2. Flash chip re-programming coverage..................................................................................... 100.
Figure F-3. Flash chip re-programming process flow ............................................................................... 101.