Specifications

VXIbus Interface
VXIbus Mapped Registers
The EPC-7 contains a set of configuration and operational registers mapped into the
VXIbus A16 address space as 16-bit registers. These registers begin at a base related
to the EPC-7's logical address. This base is given by
11uu uuuu uu00 0000
where uuuuuuuu is the EPC-7's unique logical address (ULA). The EPC-7 is a VXI
DC device (dynamic configuration), meaning that after a system reset, its ULA is
FFh, and it only responds to A16 accesses at the resultant base FFC0h and beyond if
the MODID line is asserted. Once the EPC-7 is assigned a ULA, uuuuuuuu becomes
this new ULA (whose value appears in the ULA register).
The mapping of registers in the A16 space is shown in the following table. For
registers that are also accessible from within the EPC-7 via an I/O address, the I/O
address is given in parentheses.
Offset Upper byte Lower byte
0 ID (8141) ID (8140)
2 Device type (8143) Device type (8142)
4 Status/control (8145) Status/control (8144)
6 Slave offset (8147) Slave offset (8146)
8 Protocol/signal (8149) Protocol/signal (8148)
A Response (814B) Response (814A)
C Message high (814D) Message high (814C)
E Message low (814F) Message low (814E)
10 A24 shared memory pointer high
12 A24 shared memory pointer low
14 A32 shared memory pointer high
16 A32 shared memory pointer low
20 Alternate response register
77
Table 16. A16 Register Mapping.
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