Specifications

EPC-7 Hardware Reference
Slot 0 and System Controller Functions
When the EPC-7 is configured as the slot 0 controller, it performs the VXI slot-0
functions and the VME system controller functions.
The slot-0 functions consist of generation of the CLK10 signals and MODID support.
The system controller functions are the following:
• Serves as the bus arbiter (priority or round-robin)
• Drives the 16 MHz SYSCLK signal
• Starts the IACK daisy chain.
• Provides Bus Timer function
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When configured as the system controller, the EPC-7 detects and terminates data
transfer bus timeouts. Once it sees either the
DS0 or DS1 lines asserted, a counter is
started. If the counter expires before both
DS0 and DS1 are deasserted, the
EPC-7 asserts the VMEbus
BERR signal until both data strobes are deasserted. The
duration of the VMEbus timeout counter is 100-120 µsecs. When the EPC-7 is
configured as the slot-0 controller, this timeout cannot be disabled and the duration
cannot be changed.
Although the EPC-7 provides the required timeout function for data transfer time-
out, it does not provide the optional bus grant timeout. If another master has been
granted permission to use the data bus but does not access (or relinquish) the data
bus, the bus will be "hung" indefinitely.
Reset Behavior
Setting bit RSTP in the status/control register puts the EPC-7 in the soft reset state.
The EPC-7 continues to execute instructions in this state, and an interrupt (VXR) can
be enabled to detect entry into this state.
(For more information about the registers and their bits that are discussed in this
section, refer to Chapter 7, VXIbus Interface.)
The soft reset state inhibits any VXI data-transfer operations and prevents the
assertion of the VXI interrupt and trigger lines. It does so by clearing the following
registers:
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