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® EPC - 7 Hardware Reference ® RadiSys Corporation 15025 S.W. Koll Parkway Beaverton, OR 97006 Phone: (503) 646-1800 FAX: (503) 646-1850 ______________________________________________________________________ 07-0103-02 September 1994 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
EPC-7 Hardware Reference EPC and RadiSys are registered trademarks and EPConnect is a trademark of RadiSys Corporation. OS/2, IBM, EGA, PS/2, and PC/AT are trademarks of International Business Machines Corporation. 386 and 486 are trademarks of Intel Corporation. Microsoft and MS-DOS are registered trademarks of Microsoft Corporation. February 1992 Copyright © 1992, 1994 by RadiSys Corporation All rights reserved. Page ii Artisan Technology Group - Quality Instrumentation ...
EPC-7 Hardware Reference Hardware Warranty RadiSys Corporation ("RadiSys") warrants the EPC system and component modules to the original purchaser for two years from the product's shipping date. If an EPC product fails to operate in compliance with its specification during this period, RadiSys will, at its option, repair or replace the product at no charge. The customer is, however, responsible for shipping the product; RadiSys assumes no responsibility for the product until it is received.
EPC-7 Hardware Reference NOTES Page iv Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
EPC-7 Hardware Reference Contents 1. Product Description............................................................................................1 Specifications....................................................................................................2 2. Before Installation ..............................................................................................5 Configuring the EPC-7 Jumpers .......................................................................
EPC-7 Hardware Reference 5. Theory of Operation...........................................................................................25 Memory Map ....................................................................................................26 Processor and Memory .....................................................................................27 Cached and Uncached Addresses.............................................................27 ROM and ROM Shadowing..................................
EPC-7 Hardware Reference 8. Upgrades..............................................................................................................77 Memory.............................................................................................................77 9. Troubleshooting & Error Messages..................................................................81 Troubleshooting ................................................................................................81 Common Error Messages.....
EPC-7 Hardware Reference Figures Figure 1. EPC-7 Configuration Jumpers ................................................. 6 Figure 2. Daisy-Chain Signal Concept..................................................... 7 Figure 3. VXIbus Backplane Jumper Examples ...................................... 8 Figure 4. VXIbus Jumpers or DIP Switches on Front of Chassis ............ 9 Figure 5. VXIbus Jumpers on Rear Wirewrap Pins ..................................9 Figure 6. Power-on Screen Display.....................
1 1. Product Description This manual contains all the information needed to install and use the EPC-7 VXIbus embedded computer. Additional user and programmer manuals discuss the use of the EPConnect software package designed to work with the EPC-7. The EPC-7 is a C-size VXIbus embedded computer based on the Intel 486 processor. It can perform 8-, 16-, and 32-bit VXIbus data transfers, both as master and slave, and can be the slot-0 and system controller and resource manager.
EPC-7 Hardware Reference 1 1 Specifications The following tables define the power and environmental specifications of the EPC-7. They do not include any EXM modules in the EPC-7. The following are the environmental specifications of the EPC-7 when it contains no internal disk drives.
Product Description The following are the environmental specifications of the EPC-7 when it contains floppy and hard disk drives.
EPC-7 Hardware Reference 1 1 The following table contains additional specifications. measured with hard and floppy drives and no EXMs. Characteristic Electrical Current +5V +12V -12V -5.2V -2V Other Weight VME VXI without EXMs master address master transfer slave address slave transfer interrupter interrupt handler requester arbiter system controller device type protocols manufacturer code model code Power and current are Value 6.0 A typ, 7.0 A max (33 MHz) 7.0 A typ, 8.0 A max (50 MHz) 7.
2. Before Installation 2 Before installing the EPC-7, unpack and inspect it for shipping damage. DO NOT REMOVE ANY MODULES FROM THEIR ANTI-STATIC BAGS UNLESS YOU ARE IN A STATIC-FREE ENVIRONMENT. THE EPC-7 MODULES, LIKE MOST OTHER ELECTRONIC DEVICES, ARE SUSCEPTIBLE TO ESD DAMAGE. ESD DAMAGE IS NOT ALWAYS IMMEDIATELY OBVIOUS, IN THAT IT CAN CAUSE A PARTIAL BREAKDOWN IN SEMICONDUCTOR DEVICES THAT MIGHT NOT IMMEDIATELY RESULT IN A FAILURE. THE EPC-7 CONTAINS A HARD DISK. PLEASE HANDLE IT WITH CARE.
EPC-7 Hardware Reference EPC-7 Rear View 2 2 Jumpers E P C- 7 is s lot- 0 c ontr oller E PC- 7 is not the slot- 0 c ontroller Figure 1. EPC-7 Configuration Jumpers. There are several readily apparent consequences of incorrectly configuring the EPC-7 configuration jumpers. − − − − − − Resource manager reports a system configuration differing widely from the actual configuration Power-on selftest reports a VXI failure. CLK10+ and CLK10- signals are not being driven or are out of spec on the backplane.
Before Installation Installing the VXIbus Backplane Jumpers The VXIbus contains several daisy-chained control signals. Most VXIbus backplanes contain jumpers or DIP switches for these control signals to allow systems to operate across empty slots. Failing to install these jumpers properly is a common source of problems when integrating a new VXIbus system. In this manual, these jumpers or DIP switches will be referred to as jumpers.
EPC-7 Hardware Reference handle any of these signals. Check the manual for each board to be installed to determine if these signals are passed through correctly. If they are not or if the VXIbus slot is empty, all (or some) of these signals must be jumpered. See Figure 3 below. 2 2 indicates jumper needed BG0 BG1 BG2 BG3 IACK Single Board Computer that only handles IACK & BG3 "Dumb" Slave Does not handle any of the signals Figure 3. VXIbus Backplane Jumper Examples.
Before Installation Now that you have determined where the jumpers need to be, you must determine how to jumper your particular backplane. VXIbus chassis provide jumper connections in one of three ways; stake pins, DIP switches, or auto jumpering. If the chassis in use auto-jumpers the daisy-chain signals, proceed to the next chapter.
EPC-7 Hardware Reference J1 Connectors The stake pins (front or rear) can also be located adjacent to the slot being jumpered as shown in Figure 4 above. Typically, the stake pins will be located between the slot being jumpered and the next lowernumbered slot (e.g. jumpers for Slot 6 would be located adjacent to Slot 6 between Slots 5 and 6).
Before Installation NOTES 2 Page 11 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
3. Installation 3 EPC-7 Insertion The EPC-7 is inserted in a VXIbus card cage in the following way: 1. Make sure that power to the VXI system is off. The modules are not designed to be inserted or removed from live backplanes. 2. Align the EPC-7 to adjacent top and bottom card guides in the VXI chassis. 3. Slide the EPC-7 module into the chassis. Use firm pressure on the handles to mate the module with the backplane connectors. 4.
EPC-7 Hardware Reference To insert an EXM, slide the EXM into place in the card guides, push firmly on the EXM front panel to seat the rear cardedge connector, and tighten the thumb screws on the EXM's face plate. MAKE SURE THAT POWER TO YOUR VXI SYSTEM IS OFF. EXMS ARE NOT DESIGNED TO BE INSERTED OR REMOVED FROM LIVE SYSTEMS. 3 WHEN INSERTING AN EXM, AVOID TOUCHING THE CIRCUIT BOARD, 3 AND MAKE SURE THE ENVIRONMENT IS STATIC-FREE.
Installation If the BIOS produces the message "KEYBOARD ERROR OR NO KEYBOARD PRESENT" at time of power-on or reset, either no keyboard is present, the keyboard cable is not firmly connected, a key was pressed, or the keyboard is not a PC/AT compatible keyboard. If you wish to operate your system without a keyboard, you must start with a keyboard and invoke the BIOS setup screen to change the Configuration Errors field to "ignore keyboard errors.
EPC-7 Hardware Reference External Clock Input 3 3 The EPC-7 provides the option, when it is configured as the slot-0 controller, of deriving the ECL CLK10 signal from an internal oscillator or from a 10 MHz external clock source. An SMB connector is provided on the front panel. The external clock input is TTL compatible. It is not resistively terminated. It presents one FAST TTL unit load (IIH < 0.02mA, IIL < -0.6 mA). The external clock signal must have TTL levels.
4. Configuring the BIOS Setup Power-On Screen Display Whenever a hardware reset (power-on or front-panel) occurs on the EPC-7, information is displayed on the attached monitor showing the status of the BIOS selftest and the amount of memory found. If everything proceeds normally, the screen image should appear approximately as shown in the following figure. 4 486 Modular BIOS version 3.05abd, Copyright (c) 1984-90 Award Software Inc. Copyright 1991 RadiSys Corporation BIOS V3.
EPC-7 Hardware Reference Some error messages might occur during the execution of the BIOS initialization sequence. If errors occur during the power-on self-test (POST), the BIOS will display the error on the appropriate line of the screen display and attempt to continue. BIOS Setup Screen The EPC-7's BIOS contains a setup function to display and alter the system configuration. This information is maintained in the EPC-7's nonvolatile CMOS RAM and is used by the BIOS to initialize the EPC-7 hardware.
Configuring the BIOS Setup Use the up and down cursor (arrow) keys to move from field to field. For most fields, position the cursor at the field and press the left and right cursor (arrow) keys to rotate through the available choices. Once the screen has been changed to appear as desired, press the F10 function key to save the changes in nonvolatile (batterybacked) CMOS RAM and then press the F5 function key to confirm the changes and reboot. Alternately, press the ESC key to ignore any changes and exit.
EPC-7 Hardware Reference BUS RELEASE METHOD This field entry toggles between two bus release modes: ROR (release on request) and RONR (request on no request, also known as the VXI fair-requester mode). ROR results in slightly better EPC-7 performance when accessing the VXIbus; RONR directs the EPC-7 to not "park" on the bus and thus slightly improves the access time of other VXIbus masters to the bus.
Configuring the BIOS Setup The BIOS displays the configuration information in hexadecimal format. RadiSys EPC-7 EXM Setup, System BIOS V3.05 50MHz 486, 16 MBytes memory Slot 0 1 2 3 4 5 ID FF FF FF FF FF FF OB1 00 00 00 00 00 00 OB2 00 00 00 00 00 00 F10 = Okay ESC = Cancel Figure 8. EXM Setup Menu. EXMs must be defined in this screen so the BIOS can correctly identify and initialize each one at boot-up. Each EXM must be listed by slot number, ID and two option bytes as defined below.
EPC-7 Hardware Reference Consult the EXM manual for the correct configuration information for each EXM expansion module installed. After all EXMs have been configured, press F10 to save the data or ESC to ignore the changes. In either case you will be returned to the main setup screen. When using EXMs with configurable interrupts, DMA channels, I/O addresses, and/or memory addresses, avoid conflicts with built-in functions of the EPC-7. Guidelines are: 1. 4 4 2. 3. 4.
Configuring the BIOS Setup The Fixed Disk Menu screen looks similar to the one below. RadiSys EPC-7 Fixed Disk Menu, System BIOS V3.05 50MHz, 16 MBytes memory Fixed Disk Drive C: AT Type 40 101 MBytes: Landing Zone: 1023 754 Cyls, 16 Heads, 17 Sectors Precompensation: None Fixed Disk Drive D: None F10 ESC = Save and return = Return without saving Figure 10. Fixed Disk Menu. AT Disk type AT denotes the many types of non-SCSI PC/AT compatible drives including IDE.
EPC-7 Hardware Reference P1 Drive Label P2 4 4 Figure 11. Location of Disk Drive Label. User-Definable Drive Types If the correct AT disk type is not listed, the EPC-7 provides user-editable drive types 48 and 49. Select either of these drive types. Use the TAB key (→| )or the left and right cursor keys (← →) to move to the next (or previous) field. Note that the default settings for MBytes, Cylinders, Heads, and Sectors is 1. MBytes is a display-only field calculated by the BIOS.
Configuring the BIOS Setup The new hard disk may have parameters larger than the allowable maximum. If the drive parameters are greater than the allowable maximum, divide the actual number of cylinders by 2 and multiply the actual number of heads by 2. IDE drives use Universal translation mode. That is, each sector is addressed as an absolute sequential sector number.
EPC-7 Hardware Reference For low-level formatting of an IDE hard drive, a disk utility must be used, such as DOSUTILS from Ontrack Computer Systems, Inc., QAPlus from DiagSoft, Inc., AMIDIAG from American Megatrends Inc., or SuperSoft Service Diagnostics from SuperSoft Inc. Low-level formatting is rarely necessary and in fact, is not possible on some of the new higher capacity IDE drives. 4 4 Page 24 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
5. Theory of Operation This chapter specifies other information about the operation of the EPC-7 that might be useful to the system designer. The block diagram below shows the overall datapath structure of the EPC-7. Note that numbers in parentheses denote the data width of the path.
EPC-7 Hardware Reference Memory Map 32 The 2 byte physical address space seen by the CPU is mapped according to the following table.
Theory of Operation Processor and Memory The processor is a derivative of the Intel 80486 DX. The EPC-7 was designed to work with a variety of models and frequencies of 486s; the ordering information will identify the exact 486 used. The EPC-7 is shipped as either a 33 MHz 486DX, a 50 MHz 486 DX or a 100 MHz 486 DX4. The 33 Mhz and 50 MHz EPC-7s contain an integrated floating-point coprocessor and 8 KB cache; the 100 MHz EPC-7 contains an integrated floating-point coprocessor and a 16 KB cache.
EPC-7 Hardware Reference For best possible performance, the BIOS initialization software copies 64 KB of the ROM contents into DRAM (called shadowing) at addresses 000Fxxxx. If the BIOS discovers a video controller present containing a video BIOS, the BIOS copies the video BIOS into DRAM at addresses 000C0000-00C7FFF. If the SCSI controller is enabled, the BIOS copies the SCSI BIOS into addresses 000C8000-000CFFFF. The BIOS write-protects these areas of memory, even if not being used for BIOS shadowing.
Theory of Operation IDE Disk Interface EPC-7 contains an interface for an internal IDE disk drive. The signals for the drive are supplied on the 40-pin header labeled P9, and power for the drive is supplied on the 4-pin header labeled P13. This cannot be disabled. Battery WARNING Removing the battery will invalidate the CMOS setup. Before removing, record your current values for all screens. The battery powers the CMOS RAM and TOD clock when system power is not present.
EPC-7 Hardware Reference MAKE SURE THAT THE PROCESS DESCRIBED HERE IS PERFORMED IN A STATIC-FREE ENVIRONMENT. First remove the upper two EXM modules, if present. Remove the side panel from the EPC-7 and locate the battery. The battery cell is held in place by a spring lever.
Theory of Operation EXM Expansion Interface The EXM expansion interface, an I/O expansion bus, is provided at the rear of the front-panel slots in the EPC-7. The EXM expansion interface is very similar to the PC/AT I/O or ISA bus. In addition, it contains a signal -EXMID used for dynamic recognition and configuration of EXMs. EXMs respond to one or more I/O addresses in the range 100h - 105h only when their -EXMID signal is asserted.
EPC-7 Hardware Reference Slot 0 and System Controller Functions When the EPC-7 is configured as the slot 0 controller, it performs the VXI slot-0 functions and the VME system controller functions. The slot-0 functions consist of generation of the CLK10 signals and MODID support. The system controller functions are the following: 5 5 • Serves as the bus arbiter (priority or round-robin) • Drives the 16 MHz SYSCLK signal • Starts the IACK daisy chain.
Theory of Operation • • • • • • • Bits 0-2 of the interrupt generator register TTL trigger drive register External trigger register VME A31-24 address register VME A21-16 address register VME modifier register PASS and RDY bits in the status/control register In addition, the VXR bit is set, the EVME bit is masked off, and the SBER bit is masked on.
EPC-7 Hardware Reference Printed Circuit Board The following diagram shows areas of interest on the EPC-7 circuit board. Front Battery COM2 header Floppy disk connector Connectors to EXM expansion interface subplane 5 5 Internal IDE Disk disk connector power DRAM SIMM sockets Connector to cable to secondary P1 connector for power Speaker header P2 Configuration jumpers Figure 15. PCB Layout. Page 34 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.
6. Connectors This chapter specifies the details of the connectors of the EPC-7. The DB-9 COM1 serial port connector is defined in the following table. Pin 1 2 3 4 5 Signal Carrier detect Receive data Transmit data Data terminal ready Signal ground Pin 6 7 8 9 Signal Data set ready Request to send Clear to send Ring indicator 1 6 9 5 Table 6. DB-9 Pin-out.
EPC-7 Hardware Reference 2 1 3 4 6 5 The female DB-25 LPT1 printer and parallel port on the front panel is defined in the following table. 6 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 6 Signal Strobe DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 Acknowledge Busy Paper end Select Pin 14 15 16 17 18 19 20 21 22 23 24 25 Signal Auto line feed Error Initialize printer Select in Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Signal ground Table 8. DB-25 LPT1 Pin-out.
Connectors The SCSI connector is a high-density, 50-pin, standard SCSI-2 connector of type AMP 174726-4 or equivalent. The mating connector is AMP part number 750342-5. The connector type is "shielded alternative 1" in the SCSI-2 specification. The connector pins are defined in the following table.
EPC-7 Hardware Reference 1 2 The speaker header on the EPC-7 circuit board is defined in the table below. Pin 1 Signal Reference voltage Pin 2 Signal Speaker tone Table 11. Speaker Header Pin-out. The front-panel CLK-IN connector is a miniature SMB coax connector. The input signal must be a TTL signal capable of driving a 74F04 input (interface circuit must source a Vol=0.5V max @ 1mA sink and must source a Voh=2.
Connectors Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Row A Name Use D00 IO D01 IO D02 IO D03 IO D04 IO D05 IO D06 IO D07 IO GND G SYSCLK IO 1 GND G DS1* IO DS0* IO WRITE* IO GND G DTACK* IO GND G AS* IO GND G IACK* IO IACKIN* I IACKOUT* O AM4 IO A07 IO A06 IO A05 IO A04 IO A03 IO A02 IO A01 IO -12V P +5V P Row B Name Use BBSY* IO BCLR* IO 2 ACFAIL* I BG0IN* I BG0OUT* O BG1IN* I BG1OUT* O BG2IN* I BG2OUT* O BG3IN* I BG3OUT* O BR0* IO 3 BR1* IO 3 BR2* IO 3 BR
EPC-7 Hardware Reference The following table shows the usage of signals on the VXIbus P2 connector. Row A 6 6 Row B Row C Pin Name Use Name Use Name Use 1 ECLTRG0 IO +5V P CLK10+ IO 2 -2V P GND G 3 ECLTRG1 IO RSV1 4 GND G A24 5 MODID12 IO A25 CLK10- IO GND G IO -5.2V P IO LBUSC00 6 MODID11 IO A26 IO LBUSC01 7 -5.
Connectors The P1 connector below is the "rightmost" one used for power. The connector propagates the bus-grant and IACK daisy chains through the rightmost slot occupied by the EPC-7 so that installing backplane jumpers in this slot is unnecessary.
EPC-7 Hardware Reference Floppy Connector The EPC-7 offers two floppy connectors: a 34-pin connector and a smaller 26-pin connector that is a subset of the 34-pin connector. This is a build-time option.
7. VXIbus Interface This chapter describes the EPC-7 VXIbus interface as seen by a program. Wherever possible, users should avoid direct use of most of these facilities. The VXIbus interface should be accessed through RadiSys' EPConnect software, an easy-to-use, high-level interface that frees you from most machine-dependent considerations.
EPC-7 Hardware Reference set for every access using the E-page window. Make sure that those registers not directly supplying address lines are set to "FF" values in the appropriate bit positions. Direct VMEbus Accesses An alternate way to perform VMEbus accesses, providing that the EPC-7 is running in protected mode is to perform reads and writes at 486 addresses above 10000000h (256 MB).
VXIbus Interface When accessing the VMEbus in this manner, the source of the VMEbus address lines is defined below. A32 31 30 29 0 00 From 486 address bits 29-0 A24 23 0 From 486 address bits 23-0 A16 15 0 From 486 address bits 15-0 The main purpose of the direct VMEbus access mechanism, as opposed to the E-page mechanism, is for multitasking 32-bit operating-system environments, where multiple tasks need to make VMEbus accesses.
EPC-7 Hardware Reference The EPC-7 contains programmable byte-swapping hardware to allow programs to read or write VMEbus memory in either byte order. When using the E-page to access the VMEbus, the order is selected by bit 5 (BORD) in the VME modifier register (8151). When using direct memory mapping, the order is address-range dependent (e.g., E0000000-E0FFFFFF accesses the A24 space with big endian byte ordering, and 20000000-20FFFFFF accesses the A24 space with little endian byte ordering).
VXIbus Interface D16 Access D32 Access Addr+1 Addr 32 10 LSB Addr+1 Addr 10 32 486 Address Motorola MSB Address Addr+3 Addr+2 Addr+1 Addr 76 54 32 10 LSB Addr+3 Addr+2 Addr+1 Addr 10 32 54 76 MSB Figure 17. Big-Endian Byte-swapping.
EPC-7 Hardware Reference Slave Accesses from the VMEbus When SLE (Slave Enable) in the status/control register (8145) is set, the EPC-7's dual-ported memory will respond to accesses from other VMEbus masters. All types of VME accesses (reads, writes, and read-modify-writes of all lengths) are supported, except for block transfer cycles. The EPC-7 responds to supervisory, non privileged, program, or data access modes.
VXIbus Interface This ability is also useful in system checkout (i.e., checking operation of the backplane) and in giving an EPC-7 program the ability to view its memory in big endian format. A24 and A32 slave accesses result in accesses to the on-board DRAM and never to the cache. Because the EPC-7's cache is a write-through cache, there is never a discrepancy between data in the cache and the DRAM.
EPC-7 Hardware Reference One more case of interest is when the EPC-7 performs a locked access that results in a self access. These function correctly (i.e., as if the access was not a self access), providing that operating-system tables (e.g., page tables) that are accessed by the CPU by implicit locked accesses are not mapped into VME. This would only be a concern for user-written operating systems.
VXIbus Interface Status/Control Reg, lower SRIE 1 SYSC 1 RDY PASS NOSF RSTP 8144 Status/Control Reg, upper SLE MODI SYSR 1 1 1 1 1 8145 Slave Offset Reg, lower 1 1 1 1 1 1 1 1 8146 Slave Offset Reg, upper Base 8147 Protocol/Signal Reg, lower 1 1 1 1 1 1 1 1 8148 Protocol/Signal Reg, upper 0 0 0 1 1 0 1 1 8149 Response Register, lower LOCK 1 ABMH SIG MLCK WRCP FSIG LSIG 814A Response Register, upper 0 1 DOR DIR ERR RRDY WRDY 1 814B Mess
EPC-7 Hardware Reference MODID / Interrupt Gen Reg MO04 MO03 MO02 MO01 MO00 MODID Upper Register MO12 MO11 MO10 MO09 MO08 MO07 MO06 MO05 8159 TTL Trigger Drive Register TTD7 TTD6 TTD5 TTD4 TTD3 TTD2 TTD1 TTD0 815A ES1 ES0 ED1 ED0 VXR SBER 1 BSAM 815B ECL Trigger / Misc Reg Interrupt-out 8158 Unique Logical Addr Reg 815C Module Status/Control Reg 7 IST 1 BTOE WDTR FWDT 1 1 815D Signal Reg FIFO, lower 815E Signal Reg FIFO, upper 815F TTL Trigger Latch Register 7 1
VXIbus Interface Where a bit position has been described by a 0 or 1, the bit is a ROM bit, and writing to it has no effect. Bit positions labeled "RAM" are register storage bits that have no special hardware interpretation. Unless otherwise noted below, all registers and bit values are readable and writeable. EXM Configuration Reg reserved Slot Number 96 This register is used to assert a -EXMID signal to a specific EXM slot.
EPC-7 Hardware Reference Whenever the EPC-7 is held in the reset state, EVME is masked off (but the register bit is not changed). Bit 0 Set to 0. Memory Mode Register MDFF MDCF RAM MEMS RAM RAM 8104 This register controls certain DRAM operational parameters. MDFF When set (1), the 00FFxxxx region of memory is treated as normal DRAM. When 0, reads to this region are mapped into the ROM area of the address space.
VXIbus Interface Since the EPC-7 is a DC device (a device whose ULA can be assigned dynamically by the resource manager), an initial write to this register address from the VXIbus assigns a ULA to the EPC-7. A32 If set (1), the EPC-7 is an A16/A32 device; otherwise it is an A16/A24 device. This is a read-only bit that is controlled by the device type register 8143 below.
EPC-7 Hardware Reference SRIE SYSRESET input enable. If set, assertion of VXI SYSRESET generates a reset of the EPC-7. One use of this bit is having software reset the VXI system (via bit SYSR) without resetting the EPC-7. This bit is read-only when accessing this register from the VXI A16 space. SYSC SYSCLK status bit. All writes to this register have the effect of clearing this bit. The bit is then set if four rising edges of the VXI SYSCLK signal are detected.
VXIbus Interface Protocol/Signal Reg, lower 1 1 1 1 1 1 1 1 8148 Protocol/Signal Reg, upper 0 0 0 1 1 0 1 1 8149 A read of this register reads the protocol register; a write writes the signal register. The protocol register (the read value) defines the EPC-7 as being a servant and commander, having a signal register, being a bus master and an interrupter, providing the shared-memory protocol, and not providing fast handshake mode.
EPC-7 Hardware Reference MLCK This EPC-7 specific bit is used for synchronization of messages from multiple senders, something not provided for in the VXI specification. If 1, the message register can be locked for the sending of a message. If 0, the message register has been locked. WRCP This EPC-7 specific bit is a read-only copy of the WRDY bit. FSIG Defined only when SIG=1, in which case FSIG is the number (0 or 1) of the register in the FIFO holding the earliest signal.
VXIbus Interface VME Modifier Register VME WA23-22 BORD IACK AM5 AM4 AM2 AM1 8151 This register is also used when the EPC-7 makes an access through its E page to the VXIbus. Bits 7 and 6 provide VXI address bits A23 and A22, respectively. Bits 3-0 define the value placed on the associated VXI address-modifier lines.
EPC-7 Hardware Reference VME Event State Register 1 1 VXRCP SIGR WDT ACFA BERR SYSF 8154 Similar to the interrupt state register, this register defines additional conditions that may result in an IRQ10 interrupt. If the bit is 0, the condition is present. VXRCP A reset has occurred. This is a copy of bit VXR in the ECL trigger/misc register. It provides a way to generate an interrupt because of certain reset conditions. SIGR Signal register FIFO is not empty.
VXIbus Interface MODID / Interrupt Gen Reg MO04 MO03 MO02 MO01 MO00 Interrupt-out 8158 This register serves two purposes: driving the VXI MODID lines and generating a VXI interrupt. If the three low-order bits are not 000, one of the seven VXI interrupt lines is asserted by the EPC-7. The line is the decoded value of these three bits (e.g., 001 denotes IRQ1, 111 denotes IRQ7). If and when an interrupt acknowledge cycle is sent to the EPC-7, the Interrupt-out bits are cleared.
EPC-7 Hardware Reference ECL Trigger / Misc Reg ES1 ES0 ED1 ED0 VXR SBER 1 BSAM 815B This read/write register contains the following bits: ES Read-only bits that show the state of the ECL trigger lines on the backplane (1 meaning asserted). ED A 1 asserts the corresponding ECL trigger. VXR VXI reset.
VXIbus Interface Module Status/Control Reg 1 IST 1 BTOE WDTR FWDT 1 1 815D This register contains the following miscellaneous status and control bits: IST Interrupt status type. This bit specifies whether a response status/ID or an event status/ID is used in an interrupt acknowledge cycle. If IST is 0, the response format is used. In the 16-bit status/ID value returned, the upper 8 bits are the value of the upper 8 bits of the response register, and the lower 8 bits are the EPC-7's ULA.
EPC-7 Hardware Reference TTL Trigger Latch Register TTL7 TTL6 TTL5 TTL4 TTL3 TTL2 TTL1 TTL0 8161 This register catches assertions of the TTL trigger that last longer than 30 ns. A read of the register returns the latched contents and clears the latches immediately thereafter. The duration of the clear pulse is 125 ns. This register is intended for use in implementing the asynchronous trigger protocol defined in the VXI specification.
VXIbus Interface Trig Interrupt Enable Reg TTI7 TTI6 TTI5 TTI4 TTI3 TTI2 TTI1 TTI0 8164 This is a mask of the interrupt conditions in the trigger latch register. A 1 denotes that the corresponding interrupt is enabled. If any bit in this register is a 1 and the corresponding bit in the trigger latch register is a 1, the EPC-7 IRQ10 interrupt is asserted. Software may then examine the interrupt state register, event state register, and trigger latch register to determine the cause.
EPC-7 Hardware Reference 15 Alternate Response Register bits 7-0 8 11111111 LOCK 1 ABMH 7 0 Copy of response register, lower SIG MLCK WRCP FSIG xx20 LSIG The upper half of this register is 1111 1111 and the lower half is a read-only copy of the lower half of the response register.
VXIbus Interface VXIbus Mapped Registers The EPC-7 contains a set of configuration and operational registers mapped into the VXIbus A16 address space as 16-bit registers. These registers begin at a base related to the EPC-7's logical address. This base is given by 11uu uuuu uu00 0000 where uuuuuuuu is the EPC-7's unique logical address (ULA).
EPC-7 Hardware Reference Supported Address Modifiers 2Dh A16 supervisor 39h 3Ah 3Dh 3Eh A24 non-privileged data A24 non-privileged program A24 supervisor data A24 supervisor program 09h 0Ah A32 non-privileged data A32 non-privileged program 0Dh 0Eh A32 supervisor data A32 supervisor program Table 17. Supported Address Modifiers.
VXIbus Interface 3. The unused address lines A31-A16 may float when not being used. Registers 8150 and 8130 must be set so that each line is a 1. Set register 8130 to FCh and register 8150 to FFh. 4.
EPC-7 Hardware Reference 6. Read the data.
VXIbus Interface 5. Set register 8130 with the value corresponding to bits 21-16 of the VMEbus address with the two low order bits of the register set to 0. VMEbus Address bits 21-16 6. Map the address. 7.
EPC-7 Hardware Reference RRDY WRDY IRQ1 IRQ2 VXIbus interrupts IRQ3 IRQ4 VME interrupt state register VME interrupt enable register VME event state register VME event enable register Trigger latch register Trigger interrupt enable register IRQ5 IRQ6 IRQ7 SYSFAIL BERR ACFAIL WDT SIGNAL FIFO VXRCP PC architecture IRQ10 TTLTRG0 TTLTRG1 TTLTRG2 7 7 VXIbus TTLTRG3 TTL TTLTRG4 triggers TTLTRG5 TTLTRG6 TTLTRG7 Interrupt-causing signals are visible in three state registers.
VXIbus Interface The state registers can also be read by non-interrupt-handler software to poll for the state of these signals. The enable registers allow one to mask selectively these 22 status signals. A 0 status bit and a corresponding 1 enable bit causes the PC architecture IRQ10 interrupt to be asserted. Unlike the 22 input conditions, which are level sensitive inputs, the PC architecture defines the PC interrupts, such as IRQ10, as edge sensitive.
EPC-7 Hardware Reference Read-Modify-Write Operations The EPC-7 provides synchronization integrity in its local DRAM between accesses from the 486 into the DRAM and RMW VXI accesses from other masters into the DRAM. When a VXIbus slave read access occurs to the local DRAM, the EPC-7 watches the VXIbus data and address strobes to determine if the cycle is an RMW cycle. If it is, accesses by the 486 are held up until the terminating access of the RMW cycle occurs. When the 486 performs a locked access (e.g.
VXIbus Interface In the soft reset state, a device is inactive, interrupts which are pending are unasserted, and all pending bus requests are removed. While in this state, the device's VMEbus slave interface is active. To achieve this functionality without resetting everything on the board, the EPC-7 performs a sequence of events when RSTP bit is set or when VME SYSRESET is asserted and SYSREST INPUT ENABLE bit is clear (bit 7 of VSC, register 8144). This disables the SYRESET - PCRESET logic.
EPC-7 Hardware Reference IF SBER is asserted by itself, then a BERR response occurred to one of the VME accesses. If both SBER and VXR bits are asserted, then the checking described in point 1 must be followed to determine the source of the VXR. Two conditions generate hardware resets that include resetting all of the hardware. One is receipt of VME SYSREST with bit SRIE set.
8. Upgrades DO NOT HANDLE THE EPC-7 MODULE UNLESS YOU ARE IN A STATIC-FREE ENVIRONMENT. Memory The EPC-7 can be configured for 4 MB, 8 MB, 16 MB or 32 MB. The 32 MB configuration is a factory build-time option only. The 33 MHz and 50 MHz EPC-7 memory configurations use SIMMs with the following specifications: • • • • 72 pin fast page mode 80 nanosec. (or better) single-sided For 4 MB, Use 4 each 256K x 36 SIMMs.
EPC-7 Hardware Reference • • • • 72 pin fast page mode 60 nanosec. (or better) single-sided or double-sided For 8 MB, Use 2 each 1M x 36 SIMMs. RadiSys P/N 70-0074 For 16 MB, Use 4 each 1M x 36 SIMMs. RadiSys P/N 70-0074 For 32 MB, Use 2 each 4M x 36 SIMMs. RadiSys P/N 70-0075 For 64 MB, Use 4 each 4M x 36 SIMMs. RadiSys P/N 70-0075 The EPC-7 SIMMs work in pairs. When configuring an EPC-7 with two SIMMs, the SIMMs should be placed in sockets 1 and 3. Sockets 2 and 4 should remain empty.
Upgrades EPC-7 Front Battery P1 Hard Disk 1 2 3 4 P2 Floppy SIMMs Figure 18. Location of SIMM sockets. After upgrading the memory, reboot the system. The error message "Memory Size error - run setup" will display after the power-on self-test completes. Press CTRL+ALT+ESC to enter the Main Setup Menu. Verify that the top line of this screen shows the correct amount of memory. Press F10 to save and F5 to confirm and reboot. The system will reboot and no error messages should be displayed.
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9. Troubleshooting & Error Messages Troubleshooting This section deals with problems that you may encounter that do not provide an error message. If an error message is displayed, see the next section of this chapter, Common Error Messages. Symptoms Possible cause(s) Solution System appears to boot (evidenced by RUN LED being on, floppy and hard disk being accessed) but provides no video. Video adapter not fully seated. Remove the video adapter. Monitor or cable problem.
EPC-7 Hardware Reference Symptoms Possible cause(s) Solution System fails at power-up will not run power-on selftest. The system is not getting power. Check the backplane and verify that +5V power is good. Verify that the EPC-7 is fully seated in the chassis. Hardware failure. This cannot be diagnosed in the field. Call RadiSys Technical Support. Verify that backplane +12V and -12V are good. Serial port(s) do not work. System hangs during boot process (Master LED on; RUN LED off) 9 Bad power.
Troubleshooting & Error Messages System will not across VMEbus. talk The VMEbus backplane may not be jumpered correctly. See the section Installing the VXIbus Backplane Jumpers, on page 7. More than 1 master may be set to provide Slot-0 functions. Make sure that only 1 system is configured as the Slot-0 controller and that it is the left-most system in the chassis. The EPC-7 may have bent pins. Remove the EPC-7 and verify that no pins are bent. Then reinsert the EPC-7. VMEbus interface failure.
EPC-7 Hardware Reference Common Error Messages This section contains a summary of error and warning messages alphabetized by message text. These are messages generated by the BIOS and MS-DOS that may be related to your hardware configuration. CMOS CHECKSUM INVALID Problem: Something in the nonvolatile CMOS RAM is incorrect. Solution(s): Run the BIOS setup program to determine what is wrong, and correct it. If the error occurs repeatedly, the EPC-7's battery has failed.
Troubleshooting & Error Messages DISKETTE DRIVES OR TYPES MISMATCH ERROR - RUN SETUP Problem: The floppy diskette installed in the system does not match the configuration information listed in the BIOS setup screen. This may be due to incorrect entries in the BIOS setup screen or the drive may not be responding at power-up. Solution(s): Press CTRL+ALT+ESC to run the BIOS setup program. Make sure the BIOS setup entries relating to floppy drives correctly reflect the attached floppy drives.
EPC-7 Hardware Reference FLOPPY DISK CNTRLR ERROR OR NO CNTRLR PRESENT Problem: The configuration information in the BIOS setup says that one or more floppy disk drives are expected, but a floppy disk controller could not be found. Solution(s): If you have no floppy diskette drives, enter the setup program and set both floppy drives to "NONE." If you should have a floppy diskette drive configured, return the EPC-7 to RadiSys for repair. GENERAL FAILURE READING DRIVE ...
Troubleshooting & Error Messages The keyboard may not be a valid PC/AT keyboard (e.g., it is a PC/XT-only or PS/2 keyboard). If this is the case, replace the keyboard with a PC/AT style keyboard. MEMORY PARITY INTERRUPT AT ... Problem: This could be a software error (reading a nonexistent memory area) or a true hardware failure. Solution(s): Attempt to repeat the error.
EPC-7 Hardware Reference NON-SYSTEM DISK OR DISK ERROR REPLACE AND PRESS ANY KEY WHEN READY Problem: This is caused by an attempt to boot from a disk or diskette that is not recognized as a system disk; that is no system files exist on the disk or diskette. Solution(s): Most often it results when you reboot with a non-system diskette in the floppy drive, because the BIOS always attempts to boot from the floppy drive if a diskette is installed.
Troubleshooting & Error Messages REAL TIME CLOCK ERROR - RUN SETUP Problem: The battery-backed TOD clock is incorrect. Solution(s): Run the BIOS setup program to determine what is wrong, and correct it. If the error occurs repeatedly, the EPC-7's battery has failed. SCSI related problems SCSI DEVICE WON'T BOOT Problem: BIOS extension ROM is not enabled for the SCSI device to boot. Solution(s): The fixed disk drive in the main setup menu must be set to specify NONE as the drive type.
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10. Support and Service In North America Technical Support RadiSys maintains a technical support phone line at (503) 646-1800 that is staffed weekdays (except holidays) between 8 AM and 5 PM Pacific time. If you have a problem outside these hours, you can leave a message on voice-mail using the same phone number. You can also request help via electronic mail or by FAX addressed to RadiSys Technical Support. The RadiSys FAX number is (503) 646-1850.
EPC-7 Hardware Reference Repair Services Factory Repair Service is provided for all RadiSys products. Standard service for all RadiSys products covers factory repair with customers paying shipping to the factory and RadiSys paying for return shipment. Overnight return shipment is available at customer expense. Normal turn-around time for repair and re-certification is five working days.
Support and Service All non-warranty repairs are subject to service charges. RadiSys has determined that pricing repairs based on time and materials is more cost-effective for the customer than a flat-rate repair charge. When product is received, it will be analyzed and, if appropriate, a cost estimate will be communicated to the customer for authorization. After the customer authorizes the repair and billing arrangements have been made, the product will be repaired and returned to the customer.
EPC-7 Hardware Reference When shipping the product, include the following information: return address, contact names and phone numbers in purchasing and engineering, and a description of the suspected problem. Any ancillary information that might be helpful with the debugging process will be appreciated. Other Countries Contact the sales organization from which you purchased your RadiSys product for service and support. 10 10 Page 94 Artisan Technology Group - Quality Instrumentation ...
Appendix A: Interrupts & DMA Channels A Interrupts and DMA Channels All of the following interrupts are used on the EPC-7 and cannot be disabled (except COM1, COM2, and LIP1, which can be disabled in the Setup Screen.
EPC-7 Hardware Reference A A The assignment of DMA channels is shown in the following table. 0 1 2 3 5 6 7 SCSI or unassigned (see battery-backed register) unassigned floppy disk controller unassigned SCSI or unassigned (see battery-backed register) unassigned unavailable Table 19. DMA Channels. Page A2 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Appendix B: I/O Map B I/O Map The following defines the I/O addresses decoded by the EPC-7. It does not define addresses that might be decoded by EXMs in the EPC-7.
EPC-7 Hardware Reference B B 81 82 83 87 89 8A 8B 8F 96 A0 A1 C0 C2 C4 C6 C8 CA CC CE D0 D2 D4 D6 D8 DA DC DE DMA EXM Configuration Interrupt controller 2 DMA 3 4 5 6 7 8 9 A B C D E ...
I/O Map F0 F1 Port 1F0 1F1 1F2 1F3 1F4 1F5 1F6 1F7 2F8 Coprocessor Functional group IDE disk controller COM2 serial port 2F9 2FA 2FB 2FC 2FD 2FE 340 341 342 343 344 345 346 347 348 349 34A 34B 34C 34D 34E 34F 350 351 352 353 354 355 356 358 35A 35B 35C 35D 35E Port SCSI controller Functional group Clear coprocessor busy Reset coprocessor Usage B Data register Error / write precompensation Sector count Sector number Cylinder low register Cylinder high register SDH register Status/command register Rec
EPC-7 Hardware Reference B B 378 379 37A 3F2 3F4 3F5 3F7 3F8 LPT1 parallel port Floppy disk controller COM1 serial port 3F9 3FA 3FB 3FC 3FD 3FE 8102 8104 8130 8132 8134 8136 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 814A 814B 814C 814D 814E 814F 8150 8151 8152 8153 8154 8155 8156 8158 System control VXI registers VXI/VME control Printer data register Printer status register Printer control register Operations Command Data Control, also IDE drive address reg Receiver/transmitter buffer Bau
I/O Map Port 8159 815A 815B 815C 815D 815E 815F 8161 8162 8163 8164 8380 8381 8382 8383 8384 Functional group Non-volatile memory control Usage MODID upper TTL trigger drive ECL trigger ULA Module status/control Signal FIFO (lower) Signal FIFO (upper) Trigger capture Clock control External trigger control Trigger interrupt enable Address Address Address Flash data SRAM data B Table 20. I/O Map. Page B5 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
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Appendix C: Using the EPC7-AM The EPC7-AM is a factory-installed option which bolts to the right side of the EPC-7 and occupies an additional VXI slot (3 slots total). It is designed to allow the addition of one PC add-in card for use with the EPC-7 controller. In addition, it also provides a second front-panel serial port connector (COM2). C The EPC7-AM supports all types of PC (8 bit) and PC/AT (16 bit) add-in cards except bus masters that require taking over control of the ATbus (e.g.
EPC-7 Hardware Reference First, set any jumpers or switches on your add-in card. Make sure that any selections you use for IRQ levels, base addresses, or DMA channels do not conflict with the EPC-7 or any EXMs already installed. Be especially careful about cards that are software configurable. Consult the EPC-7 and EXM module manuals if necessary. If there are conflicts, your add-in card may not be recognized by the system.
Using the EPC-7 AM (Top) Remove these screws C Figure C-2. EPC-7/EPC7-AM Orientation. ÿ Loosen the front-panel thumb screw shown in Figure C-3 below. Slide the retainer clip up (toward the top of the EPC7-AM) as far as it will go. (top) Front Panel Thumbscrew PC Add-in Card Retainer Clip Install here Figure C-3. Inserting the PC Add-In Card. Page C3 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
EPC-7 Hardware Reference C ÿ Position the add-in card inside the EPC7-AM as shown in Figure C-3 above. Slide the add-in card toward the front panel until the metal end-panel of the add-in card is past the card-edge connector. Then move the add-in card down and slide it forward again to allow the flange on the top of the metal end-plate to pass through the slot in the front of the EPC7-AM as shown in Figure C-3. ÿ Slide the add-in card down so the care-edge inserts into the card-edge connector.
Using the EPC-7 AM ÿ Slide the front-panel retainer clip down until it is secure against the add-in card end plate flange. Tighten the thumb screw. ÿ If you previously removed the rear panel of the EPC7-AM, replace it now. Make sure to align the rear edge of the add-in board so it inserts into the card guide on the rear panel and restore the four screws that attach the rear panel to the EPC7-AM. ÿ Replace the side panel of the EPC7-AM with the 8 screws removed previously.
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Index A16 43, 44, 45, 68 A24 43, 44, 45, 48, 55, 68 A32 43, 44, 45, 48, 55, 68, 70 ACFAIL 60, 71 address lines 44 address modifier 44, 45, 48, 59, 69 address modifiers 68 Alternate response register 66 Altitude 2, 3 Arbitration mode 18, 53 Arbitration priority 53 Asynchronous trigger protocol 64 AT 21 backplane 8 Backplane jumpers 7, 41 base address 48 Battery 84, 89 cell type 29 holder 29 life 29 location 34 removal 30 replacement 30 Battery backed register 53 BERR 32, 48, 57, 60, 62, 66, 71 BG0 - BG3 7 B
Index I I CTRL+ALT+ESC 79, 85 CTRL+ALT+ESC keys 16 Current 4 D08 46, 50 D16 46, 47, 50 D32 46, 50 Daisy chain 7, 32 daisy-chain lines 7 data bus 32 Data strobes 60 DC device 55, 67 device state 74 Device type register 55 disk boot failure 84 disk drive label 22 Disk errors 17 Disk formatting 23, 24 Disk setup 15–23 disk type AT 21 flash 21 none 21 SCSI 21 DMA channels 20, 53 DRAM 47, 48, 49 DRAM control 54 DRAM options 27 DRAM size 54 DRAM sockets 34, 79 DTACK 48 Dual-port memory 27 dual-ported memory 4
Index I/O addresses 20 IACK 7, 32 IACK daisy chain 32, 41 IackIn 7 IackOut 7 ID register 54, 62 IDE 24, 29 universal translation mode 23 Interrupt 8259 controller 73 acknowledge 61 acknowledge cycle 63 assignments 20 daisy chain 7, 41 generation 61 handler 71–73 IRQ10 59, 60, 65, 71, 73 message 71 reset 60, 71 trigger 65, 71 interrupt acknowledge 45, 59 interrupt acknowledge cycle 50 interrupt acknowledge signal 7 Interrupt generator register 33, 50 IRQ10 interrupt 60, 71 J1 connector 8, 31 J2 connector 3
Index I I Non-system disk error 88 Offset register 56 onboard cache 27 OS/2 53 P1 connector 31, 34 P2 connector 31 page tables 50, 74 Parallel port 13, 20, 36 Parity 27 parity error 88 Parking 18 part numbers 78 memory 77 PASS bit 33 PC/AT compatibility 27 pin-out, floppy disk drive connector 42 Power 4 Printed circuit board 34 Printer port 13, 20, 36 priority 32 Priority arbiter 53 Priority arbitration 18 Priority levels 17 Processor 27 protected mode 44 Protocol register 57 RDY bit 33 Read ready 57
Index Shock 2, 3 Signal FIFO register 63 Signal interrupt 71 Signal register 57 Signal register FIFO 57, 60 SIMM sockets 78 SIMMs 77, 78 slave 47, 48, 49 slave accesses 49 slave boards 8 Slave enable 55 slave memory 48 Slave offset register 56 Slot 0 arbitration 53 clock source 64 configuration 5–6 definition 5 functions 32 MODID register 61 timeout 63 Slot-1 82 Slot-1 controller 7, 32, 82 soft reset 74 Soft reset state 32–33, 75 Speaker 34, 38 specifications 77 memory 77 SRIE bit 33 Stale data 27 Start/sto
Index I I master data transfer 4 requester 4 slave data transfer 4 specifications 4 system controller 4, 5 VMEbus accesses 43, 44, 45, 48, 68 VMEbus direct mapping 43 VMEbus timeout duration 32 VMEbus troubleshooting 83 VXI device type 4 fair-requester mode 18 interface 31 local bus 11, 61 manufacturer code 4, 54 model code 4 protocols 4 registers 67 VXI expansion interface 38 VXI reset 75 VXR bit 32, 33, 62, 66 watchdog timer 30, 33, 60, 63, 73, 76 setup 30 Windows 16 Word serial messages 58 Write read
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