Specifications

5
Hardware Management
56
Reset source monitor
TheRST_SRCinputsoftheIPMCareusedtomonitorthevariousresetsourcesonthe
board.Whenoneoftheinputsisasserted,aninterruptisgeneratedtotheIPMC.The
IPMCcanthendeterminewhatactiontotakebasedonpreviousactions,suchas
watchdog,soft,orhardreset.Inaddition,theIPMCmonitorsresetstriggeredbytheIPMC
itself,suchastheIPMIwatchdogorCFDtimeout.
TheIPMCresetsourcesarelistedinTable 14.
TheIPMCprioritizestheresetsourcesaccordingtotheirnumericalvalues,withlower
valueshavinghigherpriority.Forexample,0x04hasahigherpriority
than0x06.
Table 14. IPMC reset sources
Reset source Type
Sensor reading/
event data
No previous reset N/A 0x00
Power-on reset cold 0x01
CFD Watchdog cold 0x02
BMC Watchdog (cold reset) cold 0x03
FRU Control (cold reset) cold 0x06
Legacy FPGA cold reset cold 0x09
From Emulator to request a cold reset cold 0x0A
ICH upon request for cold reset cold 0x04
BMC Watchdog (warm reset) warm
b
0x81
FRU Control (warm reset)
a
a
This reset source is not supported in CPM IPMI firmware v1.06 and above.
warm
b
b
On the CPM, all warm reset sources are converted by the legacy FPGA to cause a cold reset.
For example, a reset pushbutton assertion causes a warm reset and the legacy FPGA converts
it to a cold reset.
0x84
Reset button on front panel warm
b
0x82
ICH upon request for warm reset warm
b
0x83
Legacy FPGA warm reset warm
b
0x86