Specifications

5
Hardware Management
50
IPMC description
ThehardwaremanagementsystemoftheCPMiscontrolledbyanIPMC,whichcomprises
amicrocontroller,anIPMCFPGA,andEEPROMsforIPMCdatastorage.TheIPMCinteracts
withtheCPM’sCPUandtheShelfManagerto:
• monitortemperature,voltage,andothersensorsontheCPM
• controlandmonitorthehotswapprocessfortheCPM,AMC,andRTM
•interactwiththeShelfManagertoimplementbackplaneE‐Keying
•manageon‐boardE‐KeyingfortheAMCandtheRTM
•provideremoteconsoleaccesstotheCPMpayload
Usingserial‐over‐LANcommunications,theIPMCprovidesaremoteuserwithaccessto
theCPUserialconsolethroughthebaseinterface.Formoreinformation,seeSerial‐over‐
LANonpage 65.
TheCPM'sCPUcommunicateswiththeIPMCthroughakeyboardcontrollerstyle(KCS)
interface,whichprovidesaccesstoIPMIfunctions.ThisallowstheCPUtosendmessages
totheCPM'sIPMCortoanyothermanagementcontrollerintheshelf.Foralistofthe
IPMIcommandsanddetailsonthesensorsusedontheCPM,refertoAppendixB,IPMI
CommandsandManagedSensors,onpage 97).
IPMC microcontroller
TheIPMC’smicrocontrollerisaRenesasH8S/2166microcontroller.Thisdeviceisa
general‐purpose32‐bitmicrocontrollerwithsixteen16‐bitgeneralregisters.Itcanhandle
a16‐MBlinearaddressspace;italsocontains512KBofembeddedflashand40 KBof
RAM.
TheIPMCmicrocontrollerprovidestheonlyconnectionbetweentheCPMandthe
externalATCAshelfIPMBs.ThemicrocontrollerimplementssixI
2
Cinterfaces.Italso
supportsthefollowinginterfaces,monitoringtheinputsandcontrollingtheoutputs:
• Digitalinputs/outputs
•Analog‐to‐digital inputs
•HW‐basedI2Cinterfaces
•Serialinterfaces
•LPCinterfaces