Specifications

4
Components and Subsystems
36
I/O hub to PCI Express devices
TheCPMincludesanIntel5520chipsetI/Ohub(IOH)thatprovidesthebridgebetween
thePCIExpress(PCIe)devicesinthesystemandtheCPUQPIinterface.
TheIOHprovides36PCIeportscapableofGen1(2.5GT/s)andGen2(5GT/s)speeds.
Table 5showsthePCIExpressportmapping.
I/O controller hub (south bridge)
TheCPMusestheIntelICH10RI/Ocontrollerhub(ICH)tocommunicatewithperipheral
inputandoutputdevices.Itsfeaturesinclude:
•UptosixSATAportswithdatatransferratesupto3.0Gbpsandanintegrated
advancedhostcontrollerinterface(AHCI)controller.
•TwoUSBhostcontrollers,providinguptotwelveUSB2.0ports
•AnLPCbridge
•AnSMBus2.0controller
•AnenhancedDMAcontroller(twocascaded8237DMAcontrollers)
•Aninterruptcontrollerthatsupports:
•UptoeightPCIinterruptpins
•PCI2.3messagesignaledinterrupts
•Twocascaded82C59with15interrupts
•AnintegratedI/OAPICcapabilitywith24interrupts
•Processorsystembusinterruptdelivery
•Real‐timeclock
(RTC)circuitry
Table 5. PCI Express port mapping
Port Port Width PCI Express Peripheral PCIe Type
1 x2 Not used
2 x2 Not used
3 x4 Base Ethernet controller Gen 1
4 x4 RTM 0 Gen 2 capable
5 x8 10 Gigabit Fabric Ethernet controller Gen 1
6
7 x4 RTM 1 Gen 1 and Gen 2 capable
8 x4 Not used Gen 1
9 x4 AMC bay Gen 2 capable
10 x4 Front/rear Ethernet controller Gen 1