Specifications
4
Components and Subsystems
34
DDR3 SDRAM
TheCPMhas8VLPDIMMsocketsforregisteredDDR3SDRAMmodules.TheseDIMM
socketsaregroupedintothreeindependentchannels.Twoofthechannels(AandB)can
holduptothreeDIMMs,whilethethirdchannel(C)onlyholdsuptotwoDIMMs:
•ThreeDIMMsperchannel(AandB)isonlysupportedforsingle‐anddual‐rankDIMMs
runningat800 MHz.
•At1066MHz,onlytwoDIMMsperchannelareallowedforsingle anddual‐rank.
•Forquad‐rankedDIMMs,onlytwoDIMMsperchannelareallowedatanyspeed.
SeeTable 1onpage 17foralistof
preferredmemoryconfigurations.
FormoreinformationonsupportedSDRAMconfigurations,refertoSupportedDIMM
combinationsonpage 17.Forinformationregardingmemoryoperatingmodes,referto
thediscussionunderIntegratedmemorycontrolleronpage 32.
Redundant boot flash
Two16MBSerialPeripheralInterface(SPI)flashmemorydevicesareusedontheCPMto
providearedundantbootfunction.
SPI flash selection
TheprimarySPIflashisselectedwhentheCPMispoweredup.IftheCFDwatchdogtimer
expires,theIPMCpowersdowntheCPM,selectsthesecondarySPIflash,thenpowersup
theCPM.FormoreinformationontheCFDwatchdog,refertoCorruptflashdetection
watchdogonpage 58.
Tip:Theflashdeviceselectionforthenextbootcanbeoverriddenbysettinganoptionon
theBIOSbootmenu.
SPI flash programming
TheSPIflashcanbeprogrammedbybootingintotheEFIshellandusinganEFIreflash
utilityandaUSBflashdisk.StandardLinuxandDOS‐basedreflashutilitiescanalsobeused
forprogrammingtheflash.
Boot block protection
TheCPMusesahardwarejumpertocontrolthewrite‐protectsignaltotheSPIflashin
ordertoprotectthebootblock. Whenthejumperisinstalled,thebootblockiswrite
protected.Whenthejumperisnotinstalled,thebootblockiswrite‐enabled.Referto
Jumpersettingsonpage 152formoreinformation.