Specifications

E
Low-Level Hardware Map
164
Table 55. I
2
C and SMBus device addresses
Device Master / slave Bus # Read address Write address
IPMC EEPROM Slave 2 A1h A0h
IPMC FPGA Slave 2 C1h C0h
CPU Complex FPGA Slave 2 B1h B0h
MAX1037 ADC Slave 2 C9h C8h
MAX6618 PECI-to-I2C Slave 2 55h 54h
Tylersburg IOH Slave 2 E1h E0h
ADM1066 Slave 2 69h 68h
PMC8380 Fabric 1 Slave 3 B3h B2h
PMC8380 Fabric 2 Slave 3 B5h B6h
PMC8380 SAS Slave 3 B1h B0h
48V Power Input Module Slave 3 5Fh 5Eh
ICH10R Slave 3 89h 88h
DIMM A0 Temp Sensor Slave 3 31h 30h
DIMM A1 Temp Sensor Slave 3 33h 32h
DIMM A2 Temp Sensor Slave 3 35h 34h
DIMM B0 Temp Sensor Slave 3 37h 36h
DIMM B1 Temp Sensor Slave 3 39h 38h
DIMM B2 Temp Sensor Slave 3 3Bh 3Ah
DIMM C0 Temp Sensor Slave 3 3Dh 3Ch
DIMM C1 Temp Sensor Slave 3 3Fh 3Eh
82576EB (Base) LAN0 Slave 4 21h 20h
82576EB (Base) LAN1 Slave 4 23h 22h
82576EB (Front) LAN0 Slave 4 71h 70h
82576EB (Front) LAN1 Slave 4 73h 72h
AMC MMC Master/Slave 5 GA[2:0] = UGU; IPMB-L Address = 7Ah
a
RTM MMC Master/Slave 5 GA[2:0] = GPU; IPMB-L Address = 90h
b
CK410B+ Slave SMBus D3h D2h
DB800 Slave SMBus DDh DCh
CPU Complex FPGA Slave SMBus D1h D0h
82598EB (Oplin) Slave SMBus 03h 02h
DIMM A0 SPD Slave SMBus A1h A0h
DIMM A1 SPD Slave SMBus A3h A2h
DIMM A2 SPD Slave SMBus A5h A4h
DIMM B0 SPD Slave SMBus A7h A6h
DIMM B1 SPD Slave SMBus A9h A8h
DIMM B2 SPD Slave SMBus ABh AAh
DIMM C0 SPD Slave SMBus ADh ACh
DIMM C1 SPD Slave SMBus AFh AEh