Specifications

E
I
2
C and SMBus map
163
I
2
C and SMBus map
Figure 21illustratestheSMBusconnectionsandaddresses,whicharelistedinTable 55on
page 164.
Figure 21. I
2
C and SMBus devices
IOH
CPU Complex
FPGA
AMC PCIe
Hotswap
RTM PCIe
0 Hotswap
PEHP
SMBus
Master
ICH SMBus
SOL
AMC Bay
RTM
Backplane
FRU
EEPROM
Slave
Slave
CPU
Address
0
1
01
Oplin
H
H
RTM PCIe
1 Hotswap
Address
PCA9555
PCA9555
0x40
0x42
DDR3 DIMMs
SPD
EEPROM
Address
A0: 0xA0
A1: 0xA2
A2: 0xA4
B0: 0xA6
B1: 0xA8
B2: 0xAA
C0: 0xAC
C1: 0xAE
A0: 0x30
A1: 0x32
A2: 0x34
B0: 0x36
B1: 0x38
B2: 0x3A
C0: 0x3C
C1: 0x3E
SPD Temp
Sensor
Address
Address
Slave: 0xE0
Address
0xC8
Address
0x54
MAX1037
MAX6618
PECI to CPU
Digital Thermal
Sensor
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
LTC4307
ADM1066
IPMC2
FPGA
CPU XDP0
CK410B+ DB800
Address
0xD2
Address
0xDC
Address
SMBus:
IPMC I2C2:
0xD0
0xB0
Address
0x68
Address
0xC0
Address
0xD2
Address
0x03
74HC4052
ICH10
Master
Address
Master: 0x44
Slave: 0x88
Address
0x20, 0x22
Address
0x70, 0x72
Base
Kawela
Front
Kawela
IPMB-A
IPMB-B
IPMB-L
IPMB-L
AMC_I
2
C
H8 2166
74HC4052
I
2
C Bus 2
I
2
C Bus 3
I
2
C Bus 4
I
2
C Bus 0
I
2
C Bus 1
I
2
C Bus 5
IQ65033QMA10END-G
-48V Power Input Module
Address
0x5E
Address
0xB0
Address
0xB2
Address
0xB4
PMC8380
SAS/SATA Mux
Update Channel 0
PMC8380
Fabric 1
Mux
PMC8380
Fabric 2
Mux