Specifications

B
Temperature sensor locations
139
Temperature sensor locations
As shown in Figure 18, the CPM uses I
2
C busses 2 and 3 to access internal temperature information
for the DIMMs, CPU cores, and the I/O hub. Table 39 provides additional details about the
temperature sensors.
Figure 18. Temperature sensor locations
DDR3
CPU
SPD Temperature Sensors
(1 on each DIMM)
AMC
IPMC
IPMC
I
2
C Bus 3
MAX6618
I
2
C to PECI
IPMC I
2
C Bus 2
CPU Core DTS
(Sensor 17)
Read via PECI
I/O Hub
IOH Die Temp (Sensor 16)
available through register
Table 39. CPM temperature sensors
Sensors Location Bus Address
CPU CPU cores via DTS IPMC I
2
C Bus 2 for PECI access to the CPU through the MAX6618 0x54
IOH IOH Die Temp IPMC I
2
C Bus 2 0xE0
DIMM A0 SPD Temp Sensor IPMC I
2
C Bus 3 0x30
DIMM A1 SPD Temp Sensor IPMC I
2
C Bus 3 0x32
DIMM A2 SPD Temp Sensor IPMC I
2
C Bus 3 0x34
DIMM B0 SPD Temp Sensor IPMC I
2
C Bus 3 0x36
DIMM B2 SPD Temp Sensor IPMC I
2
C Bus 3 0x38
DIMM B0 SPD Temp Sensor IPMC I
2
C Bus 3 0x3A
DIMM C0 SPD Temp Sensor IPMC I
2
C Bus 3 0x3C
DIMM C1 SPD Temp Sensor IPMC I
2
C Bus 3 0x3E