Specifications

3
Software/Firmware Description
47
Table 12liststheRadisysdefaultsettingsfortheAdvancedmenuoftheCPMBIOSsetup.
Table 12. Radisys default BIOS Advanced menu setup options
Advanced Menu
Submenu Setup Item Values [Default]
Top level:
Advanced Menu
Front/Rear Ethernet [EEPROM Setting] Front/Copper
Rear/SGMII Rear/SERDES
Spread Spectrum [Enabled] Disabled
SOL Priority port [FRONT/Serial Port 0] REAR/Serial Port 1
PCI Subsystem Settings:
Top Level
PCI Bus Driver Version [Dynamic update]
PCI Option ROM Handling:
PCI ROM Priority
Legacy ROM [EFI Compatible ROM]
PCI 64bit Resources Handling:
Above 4G Decoding
Enabled [Disabled]
PCI Common Settings:
PCI Latency Timer
[32 PCI Bus Clocks] 64 PCI Bus Clocks
96 PCI Bus Clocks 128 PCI Bus Clocks
160 PCI Bus Clocks 192 PCI Bus Clocks
224 PCI Bus Clocks 248 PCI Bus Clocks
PCI Common Settings:
VGA Palette Snoop
Enabled [Disabled]
PCI Common Settings:
PERR# Generation
Enabled [Disabled]
PCI Common Settings:
SERR# Generation
Enabled [Disabled]
PCI Subsystem Settings:
PCI Express Settings
PCI Express Device Register Settings:
Relaxed Ordering
Enabled [Disabled]
PCI Express Device Register Settings:
Extended Tag
Enabled [Disabled]
PCI Express Device Register Settings:
No Snoop
[Enabled] Disabled
PCI Express Device Register Settings:
Maximum Payload
[Auto] 128 Bytes 256 Bytes
512 Bytes 1024 Bytes
2048 Bytes 4096 Bytes
PCI Express Device Register Settings:
Maximum Read Request
[Auto] 128 Bytes 256 Bytes
512 Bytes 1024 Bytes
2048 Bytes 4096 Bytes
PCI Express Link Register Settings
ASPM Support
[Disabled] Auto Force L0s
PCI Express Link Register Settings
Extended Synch
Enabled [
Disabled]
PCI Express Link Register Settings
Link Training Retry
Disabled 2 3 [5]
PCI Express Link Register Settings
Link Training Timeout (uS)
[100]
PCI Express Link Register Settings
Unpopulated Links
[Keep Link ON] Disable Link