Specifications
2
Hardware Description
42
Power Input Module (PIM)
Apowerinputmodule(PIM)betweentheinputfusesandmainpowerbrick(‐48Vto12V
supply)providesinputpowerconditioningandthefollowingadditionalfeatures:
•Currenthandlingupto300W
• Inrushcurrentlimitprotection
•Integratedfi lterdesignedtomeetCISPRclassBEMIlimits
•11.88Wofisolatedauxi liary3.3VpowerforIPMIcircuitry.
• 750mWofisolatedauxiliary5VpowerforIPMIcircuitry.
•ORingFETsonAandB–48Vfeeds
•A/Bfeedlossalarm
•Hot‐swapcontrol
• Glitchhold‐upcircuitbasedonexternalcapacitorand72Vchargingcircuit
• Inputundervoltageandovervoltageprotection
•Overcurrentandthermalprotection
Inadditiontotheabovefeatures,thePIMincorporatescircuitr ytochargeexternalvoltage‐
holdcapacitors.Theseexternalcapacitors(1100uF/100V)chargetoanominal72Vand
provideshort‐termtransientandpowerlossprotectioninsupportofPICMG3.0
requirements.
TwointernalPIMregulators(a3.3Vswitchingsupplyanda5Vlinearsupply)sendpowerto
IPMCcomponents,theFPGAs,RTCcircuitry,theRTM,H/SLEDs,andtemperaturesensors.
Payload power supplies
Themainpowersupply(anisolatedquarterbrickDC‐DCconv ertor;thebrick)isa‐48Vto12V
convertor.Itsuppliesallofthe+12VDCpowerfortheCPM.Withtheexceptionofthe+3.3V
and+5VoutputfromthePIM,allothervoltagesontheCPMandRTMeithercomedirectly
fromorareconvertedfromthe+12Voutputsofthisbrick.RefertoFigure 6fordetailed
informationontheDC‐DCconvertorsthatconnecttothebrickoutput,thevoltages/current
developed,andtheCPMdevicesthatindividualpayloadpowersuppliesfeed.
Trusted Platform Module (TPM)
TheCPMusesanInfineonSLB9635TT1.2TrustedPlatformModule(TPM)toimplement
version1.2ofthe TrustedComputingGroupspecification.TheTPMsitsontheLPCbusand
hastheabilitytoassertaninterruptthroughthePCHSerialIRQinterface.
TheTPMisasecurekeygeneratorandkeycache
managementdevicethatsupportsindustry
standardcryptographicAPIs.TheTPMcontainssufficientcryptographicfunctionalityto
generate,store,andmanagecryptographickeysinhardwarewhileleveragingtheresourcesof
therestofthesystemplatform.
ThefivemajorfunctionsoftheTPMare:
• Publickeyfunctionsforon‐chipkeypairgenerationusing
ahardwareRNG