Specifications

2
Hardware Description
39
Table 9liststhepotentialsources/triggersfortheMR‐Reset.Thoughsimilar,thesesourcesare
slightlydifferentfromthoseforaplatformorpowergoodreset.
Watchdog timers
TheCPMusesanumberofwatchdogtimerstopreventtheboardfromenteringan
unrecoverablestate.TheIPMCandtheIPMCFPGAprovidethefollowingwatchdogtimers:
•CorruptFlashdetectionwatchdog
•OSwatchdogtimer(Watchdog1)
•IPMCwatchdogtimer(Watchdog2)
Thefollowingsectionsdescribetheoperationsperformedbyeachwatchdog.
Corrupt Flash detection watchdog
TheCorruptFlashDetection(CFD)WatchdogisaSW‐basedwatchdogthatallowstheCPMto
recoverwhentheprimary SPIflashiseitherblankorthebootblockiscorrupted.TheCFD
watchdogtimerisstartedanytimethataresetisassertedtothepayloadprocessor(for
example,platform
reset,pushbuttonreset,andsoon).Responsibilityisthenpa ssedtothe
systemBIOStodisablethetimer.Ifthetimerisnotdisabledbeforeitexpires,theIPMC
firmware:
1. Disablespayloadpower,
2. SelectsthesecondarybootflashusingtheBootFlashSelectControl,andthen
3. Re‐enablespa yloadpowertobootfromthesecondarySPIflash.
OS watchdog timer (Watchdog 1)
ThisprogrammablewatchdogisusedwiththeBIOSandtheLinuxOS.Itcanbeusedbyany
OS.
Table 9. Memory-Retained Reset Sources
Platform Reset Source Description
Front panel Reset button
(FP_RESET*)
Pushing the button triggers an RCIN* assertion to the PCH, thus beginning the INIT*
sequence.
RTM reset push button The RTM MMC sends OEM command to IPMC. Upon receiving the “warm reset” OEM
command, the IPMC asserts IPMC_MR_RESET*
IPMC warm reset command
(IPMC_COLD_RESET*)
One of the following two triggers are detected by the IPMC:
• Watchdog timer 1 is configured for warm reset and times out.
• The IPMC warm reset command is recognized.
Once one of the above triggers are detected, the IPMC_MR_RESET* signal is asserted
to the CC FPGA which triggers an RCIN* assertion to the PCH, thus beginning the INIT*
sequence.