Specifications

2
Hardware Description
35
CC FPGA RTM-link
TheRTM‐Linkrelaysthestateofvariouscontrolandstatussignalsfromacompatible
programmabledeviceonanRTM.ThefollowingsignalsaresenttotheRTMforEthernetLED
control:
•FrontEthernetport0statusgreen
•FrontEthernetport0statusyellow
•FrontEthernetport1statusgreen
•FrontEthernetport1statusyellow
ThefollowingsignalsarereadinfromtheRTM:
•RTMUSBover ‐current(senttothePCH)
• SFP0RXLOS(SenttoI350port2)
• SFP0TX_FAULT(SenttoI350port2)
• SFP0MOD_DEF0(SenttoI350port2)
• SFP1RXLOS(SenttoI350port3)
• SFP1TX_FAULT(SenttoI350port3)
• SFP1MOD_DEF0(SenttoI350port3)
Customer header configuration
AllcontrolsignalsconfiguredonthecustomeranddebugheadersareroutedtotheCCFPGA.
Whenanysignalisinanon‐default(i.e.LOW)state,ageneralflagbitandastatebitaresetto
indicatethiscondition.TheIPMCthenreadsthestateoftheseregisterbitsaspartofanormal
sensorscan.ThesignalsassociatedwiththeCustomerheader(P2)are:
• CLEAR_NVRAM*
• SPI_WP*
• BIOS_RCVR_BOOT*
• EUSB_WP*
• UNR_DIS*
•MEFirmwareRecovery
• FORCEBACKUPBIOSBOOT