Allen-Bradley PLC-5 VME VMEbus Programmable Controllers (1785-V30B, -V40B, -V40L, and -V80B) User Manual
Important User Information Because of the variety of uses for the products described in this publication, those responsible for the application and use of this control equipment must satisfy themselves that all necessary steps have been taken to ensure that each application and use meets all performance and safety requirements, including any applicable laws, regulations, codes and standards.
Table of Contents Summary of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Using this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Manual Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . What this Manual Contains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Terms and Conventions . . . . . . . . . . . . . . . . . . . . . .
ii Table of Contents Ladder-Program Interfaces . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ladder Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Message Completion and Status Bits . . . . . . . . . . . . . . . . . . . . . VME Status File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Copy to/from VME . . . . . . . . . . . . . . . . . . . . .
Table of Contents iii Performance and Operation . . . . . . . . . . . . . . . . . . . . . . . . 7-1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VME Throughput Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Communication Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Benchmark Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction to PLC-5/VME Processor Scanning . . . . . . . . . . .
iv Table of Contents P40VRBP.H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P40VRBP.C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P40VRER.H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P40VRER.C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P40VRMW.H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P40VRMW.C . . . . . . . . . . . . . . . . . . . .
Table of Contents v Figures/Tables Compliance to European Union Directives . . . . . . . . . . . . . . . . . . Figure 2.3 Terminating a Remote I/O Link Using a Resistor . . . . . . . . . . . Figure 2.4 Programming Terminal to Channel 0 of a PLC-5/VME Processor Figure 2.5 Installing a Processor Battery (cat. no. 1770-XYV) . . . . . . . . . . Table 2.C Programming Terminal to Channel 0 Interconnect Cables . . . .
Summary of Changes Summary of Changes This release of the PLC-5/VME VMEbus Programmable Controllers User Manual contains new and updated information on PLC-5/VMEt systems. For infornmation about: See chapter/appendix: CE compliance 2 making VME self-references in POST tests 2 improved .WRDY and .
Preface Using this Manual Manual Objectives What this Manual Contains Audience The purpose of this manual is to familiarize you with the installation and use of the PLC-5/VME programmable controllers. This manual focuses on the specific VMEbus aspects of this processor. Typically, you use this processor in a VMEbus system with one or more host CPU modules that control(s) and communicate(s) with the processor.
Preface Using this Manual Terms and Conventions We refer to the: As the: Data Highway DH link Data Highway Plus DH+ link Programmable Logic Controller processor PLC-5 Processor PLC-5/VME processor. Unless noted otherwise, we use PLC-5/VME processor to denote all processors.
Preface Using this Manual Related Publications The 1785 PLC-5 programmable controller documentation is organized into manuals according to the tasks that you perform. This organization lets you find the information that you want without reading through information that is not related to your current task. Enhanced PLC-5 Processors System System Overview Enhanced and Ethernet PLC-5 Programmable Controller User Manual Overview of processor specifications.
Chapter 1 Overview Chapter Objectives Read this chapter to understand the overall operation of the PLC-5/VME processor, how you can use it in VME systems, and how its features and functions relate to those of other Allen-Bradley processors. Features PLC-5/VME processors are programmable controllers that bring the technology of the 1785 PLC-5 processor to the VMEbus environment.
Chapter 1 Overview Figure 1.
Chapter 1 Overview In the PLC-5/V40B, both channels (1 and 2) are identical although they are independently configurable. In the PLC-5/V40L, channel 2 is a local I/O (LIO) interface. The PLC-5/VME processor has the same instruction set as the standard PLC-5 processor.
Chapter 1 Overview System Description CPU PLC-5/VME processor Use the PLC-5/VME processor in a 6U (full-height) VMEbus chassis. You can use the PLC-5/VME processor by itself (i.e., with no other VME modules), but typically the PLC-5/VME processor is used in conjunction with other VMEbus computers (CPUs) and I/O modules. The examples below illustrate possible configurations. DH+ link The PLC-5/VME processor is used in conjunction with a VMEbus CPU module.
Chapter 1 Overview The following diagrams show three basic configurations for programming and debugging your ladder-logic programs. PLC-5/VME processor DH+ link PLC-5/VME processor Connect a computer via the DH+ link, typically using a 1784-KT communication device in your IBM AT computer and a 1784-CP6 cable. Connect a computer using the RS-232C on-board serial port of the PLC-5/VME processor.
Chapter 1 Overview VMEbus Interface The PLC-5/VME is fully compliant with the C.1 VMEbus specification. The PLC-5/VME processor occupies two 6U VMEbus slots. It can reside in any adjacent pair of slots, including slot 1, the system-controller slot. The PLC-5/VME processor has a single VMEbus P1 connector, allowing it to be used in VMEbus systems that have either the full J1 and J2 backplanes or only the J1 backplane.
Chapter 1 Overview Figure 1.2 illustrates the basic forms of communications. Table 1.A summarizes these communication forms. Figure 1.
Chapter 1 Overview Table 1.A Summary of Figure 1.2 In Figure 1.2, when you see : It means that: 1 Commands are high-level directives sent to the processor from another VMEbus master, typically a controlling CPU. Commands specific to the VME processor can establish a continuous block copy to/from the processor and tell the processor to which VMEbus interrupts it should respond. You can also send any PCCC via this mechanism. PCCCs are commands supported in all 1785 PLC-5 processors.
Chapter 1 Overview Compatibility with the Standard PLC-5 Processor Ladder programs from a standard PLC-5 processor run in the PLC-5/VME processor. The PLC-5/VME processor has the same program scan time as the PLC-5 processor. The PLC-5/VME processor has the same extended instruction set as the PLC-5 processor.
Chapter 1 Overview Table 1.B Comparison of 6008-LTV and PLC-5/VME Processor Attributes Attributes 6008-LTV PLC-5/VME Comments VME slots 3 2 Bus arbitration No Yes or No (user configurable) VME master Yes Yes VME Slave Yes Yes Global memory (bytes)1 1K short, 4K short or standard 64K standard Global memory is selectable Programming and downloading over backplane No Yes With 6200 series software release 4.4 and later Saving over backplane No Yes With 6200 series software release 4.
Chapter 1 Overview The PLV-5/VME processor status files in the processor status area are different in several ways. When floating point values are converted to integer, they are rounded differently. 6008-LTV rounds 0.5 to the next highest integer, the PLC-5/VME processor rounds to the nearest even integer. CPU driver programs are affected in these ways: The low-level protocol for how commands are given to the processor and how command-sending errors are reported is significantly different.
Chapter 2 Installation Chapter Objectives Read this chapter to learn how to set the switches in your PLC-5/VME processor and install it into a VMEbus chassis. See the Classic 1785 PLC-5 Programmable Controller Hardware Installation Manual, publication 1785-6.6.1 for more information about installing PLC-5 family processors. Compliance to European Union Directives If this product has the CE mark it is approved for installation within the European Union and EEA regions.
Chapter 2 Installation Handling the Processor The processor is shipped in a static-shielded container to guard against electrostatic damage. Electrostatic discharge can damage integrated circuits or semiconductors in the processor module if you touch backplane connector pins. It can also damage the module when you set configuration plugs or switches inside the module. Avoid electrostatic damage by observing the following precautions.
Chapter 2 Installation Table 2.A SW1 Set of Switches Switches 1-6 Switch 7 Switch 8 DH+ station number for channels 1A and 0 (see Table 2.B) Unused (off) Memory protect. If on, RAM memory protect is enabled. Table 2.B Station Numbers SW1 (Switches 1-6) LSD MSD Station Number N mber (Octal) 1 2 3 4 5 6 0 on on on on on on 1 off on on on on on 2 on off on on on on 3 off off on on on on . . . . . . . . . . . . . . . . . . . . .
Chapter 2 Installation Table 2.
Chapter 2 Installation Inserting the Processor into a Chassis You insert the PLC-5/VME processor in two adjacent slots in a 6U (full-height) VMEbus chassis. ATTENTION: Make sure that your VME system is powered off. The PLC-5/VME processor is not designed to be inserted or removed from a live system. ATTENTION: Avoid touching the circuit board and connectors.
Chapter 2 Installation The specific procedure for grounding a VME chassis varies depending on the style of the chassis. Read the instructions found in the Classic PLC-5 Family Programmable Controllers Installation Manual, publication 1785-6.6.1 for information on how Allen-Bradley racks are grounded, and try to ground your VME chassis frame in a similar way. ATTENTION: If you are using a PLC-5/V40L processor, your VME power supply should not float with respect to earth ground.
Chapter 2 Installation A remote I/O link using this communication rate: Cannot exceed this cable length: 57.6 kbps 3,048 m (10,000 ft) 115.2 kbps 1,524 m (5,000 ft) 230.4 kbps 762 m (2,500 ft) Prepare the Cable Cut the cable according to the lengths you need. Route the cable to the devices. Make Remote I/O Connections Use Figure 2.2 when connecting the remote I/O cable to PLC-5 processors and remote I/O adapter modules.
Chapter 2 Installation Figure 2.2 Remote I/O Terminal Connectors To connect remote I/O cable, do the following: 1. Run the cable (1770-CD) from the processor to each remote I/O adapter module or processor in the remote I/O system. 2. Connect the signal conductor with blue insulation to the 3-pin connector terminal labeled 1 on the processor and to each remote I/O adapter module (or PLC-5 adapter) in the remote I/O system. 3.
Chapter 2 Installation Use this resistor rating: If your remote I/O link: contains any device listed in Table 2.A The maximum number of The maximum number of physical devices you racks you can scan on can connect on the link the link 16 150W 16 operates at 57.6 kbps or 115.2 kbps, and you do not require the link to support more than 16 physical devices. As shown in the table above, the terminators you use determine how many devices you can connect on a single remote I/O link. Table 2.
Chapter 2 Installation Connecting an ExtendedLocal I/O Link Use the extended-local I/O cables. These cables have a single-end connector on one end and a dual-end connector on the other. The maximum cable length for an extended-local I/O system is 30.5 cable-m (100 cable-ft). Connect extended-local I/O adapters by using any of these cables (Table 2.B): Table 2.B Standard Extended-Local I/O Cables Cable Length: Catalog Number: 1 m (3.3 ft) 1771-CX1 2 m (6.6 ft) 1771-CX2 5 m (16.
Chapter 2 Installation To make extended-local I/O connections, do the following: ! PLC-5/V40L processor ATTENTION: Turn off power to the extended-local I/O adapter module before connecting or disconnecting extended-local I/O cables. Do not apply power to an I/O rack containing an extended-local I/O adapter module until all extended-local I/O cables are installed and connected. 1. Connect the single-end connector to channel 2 of the processor. 2. Route the cable to the first extended-local I/O adapter.
Chapter 2 Installation Connecting a DH+ Link Chan 1 Once you connect the programming device through a local DH+ link to one processor, the device can communicate with any PLC-5/VME processor on the link. You can also communicate with PLC-2, PLC-3, and PLC-5/250 processors connected to the link provided you have the appropriate programming software installed. The processor has electrically parallel DH+ connectors.
Chapter 2 Installation Use the 3-pin connector on the processor to connect a DH+ link. The connector’s port must be configured to support a DH+ communication link. Chan 0 You can connect a DH+ link two ways: • trunkline/dropline—from the dropline to the connector screw terminals on the DH+ connectors of the processor • daisychain—to the connector screw terminals on the DH+ connectors of the processor Chan 2 To make connections: 1.
Chapter 2 Installation Connecting a Programming Terminal to Channel 0 You can connect COM1 or COM2 from the programming terminal directly to channel 0 on the PLC-5/VME processor. This serial port supports RS-232C only. You can configure channel 0 to either: user mode—Configure channel 0 to user mode when you are connecting it to RS-232 devices such as bar code readers, weigh scales, and message displays. You can then communicate and manipulate instructions through the ladder-logic ASCII read and write.
Chapter 2 Installation Installing, Removing, and Disposing of the Battery If the processor is not powered, the processor battery retains processor memory. The appropriate battery for your processor is shipped with the processor and requires special handling. See Allen-Bradley Guidelines for Lithium Battery Handling and Disposal, publication AG-5.4. ATTENTION: Installing the battery requires handling the processor, which can cause electrostatic discharge. See Chapter 1 for details.
Chapter 2 Installation Disposing of the Battery Refer to the Allen-Bradley Guidelines for Lithium Battery Handling and Disposal, publication AG-5.4. Do not dispose of lithium batteries in a general trash collection when their combined weight is greater than or equal to 1/2 gram. A single 1770-XYV battery contains .65 grams of lithium. Check your state and local regulations that deal with the disposal of lithium batteries.
Chapter 3 VMEbus Interface Chapter Objectives Read this chapter to understand the basic low-level interface to the PLC-5/VME processor. The orientation of this chapter is based on a driver program running on a separate CPU module communicating with the processor. Unless otherwise noted, all multiple-byte numerical fields are represented in big-endian (Motorola) format, meaning that the most-significant data byte appears in the lowest-addressed byte.
Chapter 3 VMEbus Interface Bus-Release Modes Two software-selectable bus-release modes are provided: When set to: The PLC-5/VME processor: ROR releases control of the VMEbus immediately after the current data-transfer operation if it sees one of the bus-request lines asserted; otherwise it remains “parked” on the bus. RWD once granted the bus, keeps ownership of the bus for the duration of a series of contiguous data transfers (e.g.
Chapter 3 VMEbus Interface VME Signal Usage Table 3.A shows the usage of the VMEbus signals on the P1 connector. Table 3.
Chapter 3 VMEbus Interface Configuration Registers The configuration registers are a standard way of identifying, configuring, controlling, and monitoring the PLC-5/VME processor as a VMEbus device. They are mapped into the VMEbus A16 address space at a location defined by switches 1-3 of SW2. For example, if these three switches are set to ON, the first register (the ID register) is at address FC00 (hex). The registers are shown in Figure 3.1 and described individually thereafter. Figure 3.
Chapter 3 VMEbus Interface Unless otherwise noted, register bits: are initialized to 0 at reset. directly control the associated hardware function, so that changing a register bit has an instantaneous effect on the function it controls. The ID register, whose value is CFEC (hex), and the next (device-type) register, 7FE8(hex), uniquely identify the PLC-5/VME processor. The status/control register contains status and control bits, primarily for use by a separate VME CPU (see Table 3.A). Table 3.
Chapter 3 VMEbus Interface 15 14 Offset Register 13 12 11 10 9 8 SLAVE BASE 7 6 5 4 3 2 1 0 offset 1 1 1 1 1 1 1 1 07 The SLAVE-BASE field in the offset register defines the A24 mapping of the PLC-5/VME processor; register bits 15-8 are the values of the VME address bits A23-A16. This field is not altered by the PLC-5/VME processor.
Chapter 3 VMEbus Interface WRDY is used by another VMEbus master to determine whether or not the PLC-5/VME processor is ready to receive a command. The VME master processor should check that WRDY is set before it writes a command value to the Command High/Command Low registers. This prevents the VME master processor from accidentally overwriting a previously written command. The Command High/Command Low registers are a 1-deep FIFO.
Chapter 3 VMEbus Interface If you designate: The PLC-5/VME processor accesses the command block as an: A24 A24 access with the 3D (standard supervisory data access) address modifier. A16 A16 access with the 2D (short supervisory access) address modifier. One exception in the situation where A24 is designated: When you enable the PLC-5/VME processor’s slave memory and the A24 address resides within the slave memory, the PLC-5/VME processor accesses the memory locally.
Chapter 3 VMEbus Interface The structure of the command block is shown below: Word 15 14 13 12 11 10 9 8 7 0 Command word 1 Response word 6 2 5 4 3 2 1 0 Cmd interrupt level 3 Command interrupt status/ID 4 Command dependent 15 Word Command Description 0 Command word Specifies the type of command and implicitly specifies whether there is an associated command packet. 1 Response word The sender should set this to 0.
Chapter 4 Ladder-Program Interfaces Chapter Objectives Read this chapter to help you understand how to interact with the VMEbus environment from your ladder program. The PLC-5/VME processor allows ladder programs to perform direct VMEbus read and write operations as well as to generate VMEbus interrupts through the MSG instruction. This is the same data instruction that is used for Data Highway, and it is programmed the same way.
Chapter 4 Ladder-Program Interfaces Table 4.A Four Ladder Messages Message ASCII Syntax Page Copy to VME CTV # X f : e vmeaddr width numelts 4-3 Copy from VME CFV vmeaddr width # X f : e numelts 4-4 Send VME interrupt SVI vmeint statid 4-5 Check VME status file CSF 4-5 where: X is the file type.
Chapter 4 Ladder-Program Interfaces width is the width of VME transfers. Width Denotes D16 16-bit transfers D08 8-bit transfers (even/odd) D08O 8-bit transfers (odd only) D08B 8-bit transfers (even or odd depending on the starting VME address) numelts is the number of elements to be transferred (1-1000 decimal). vmeint is the VMEbus interrupt number (1-7).
Chapter 4 Ladder-Program Interfaces Example 2: CTV #N7:0 FF01 D08O 5 Example 2 reads the lower byte of elements 0 through 4 of file 7 and writes them to addresses FF01 through FF09 (odd bytes only).
Chapter 4 Ladder-Program Interfaces Send VME Interrupt Tip Your ladder program must clear the Received field for a certain interrupt level, located in word 24 of the VME status file, so that the ladder program can recognize another interrupt at that level. The update field in the VME status file must also be set to one to reflect the fact that the VME status file has changed and is ready to receive new interrupt information. This message tells the PLC-5/VME processor to assert a VMEbus interrupt.
Chapter 4 Ladder-Program Interfaces Message Completion and Status Bits The PLC-5/VME processor manipulates only two of the status bits in the control word of the internal message control block: DN (done) ER (error) For the copy operations, DN is not set until and unless the data are successfully transferred. If an error occurs, ER is set and an error code is placed in the message control block.
Chapter 4 Ladder-Program Interfaces VME Status File The VME status file is a data file in the processor’s memory. It is used to store VME setup and status information. It contains the setup information for the continuous copy to/from VME. The VME status file number is placed in word 15 of the PLC-5/VME status file. This file should be an unused integer file. The PLC-5/VME processor accesses word 15 only at initialization; thus any change of word 15 after initialization will have an unpredictable effect.
Chapter 4 Ladder-Program Interfaces The following is the physical structure of the VME status file: Word 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0 ULA SC RELM 3 Reserved SLE 4 5 6 SLADDRESS (HI BYTE) SLADDRESS FEN FAM FDS FERROR Reserved 7 8 FADDRESS (HI BYTE) 9 FADDRESS 10 FLENGTH 11 FFILE FELEMENT 12 FINT 13 FSTATUSID 14 15 TEN TAM TDS TERROR 16 17 Reserved 18 TADDRESS 19 TLENGTH TADDRESS (HI BYTE) 20 TFILE 21 TELEMENT TINT 22 23 24 TSTATUSID IRQ7E IRQ6E I
Chapter 4 Ladder-Program Interfaces Table 4.B Fields for the Physical Structure of the VME Status File Word Code Function Explanation 01 VSYSF Describes the state of the VME SYSFAIL signal. Read only. If 0, SYSFAIL is being asserted (including by the PLC-5/VME processor); if 1, SYSFAIL is not being asserted. 01 PSYSF Read only Describes the state of the VME SYSFAIL signal as being driven by the PLC-5/VME processor. If 0, the PLC-5/VME processor is asserting SYSFAIL; if 1, it is not.
Chapter 4 Ladder-Program Interfaces Continuous Copy to/from VME The PLC-5/VME can automatically read and write every ladder scan to the the VMEbus without ladder-logic programming. You can configure this function using your programming software or the ladder program itself. See your programming software documentation for specific information about where and how to configure this function in the software.
Chapter 4 Ladder-Program Interfaces Error Codes These are errors reported during the repeated continuous-copy operations initiated by the continuous-copy-to-VME and continuous-copy-from-VME commands. The existence of the error can be determined by examining the copy-to-state and copy-from-state fields in the command control register. The error code itself can be found in the VME status file.
Chapter 4 Ladder-Program Interfaces The following is the physical structure of the VME operation configuration file: Word 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0 ULA SC RELM 3 Reserved SLE 4 5 6 SLADDRESS (HI BYTE) SLADDRESS FEN FAM FDS FERROR Reserved 7 8 FADDRESS (HI BYTE) 9 FADDRESS 10 FLENGTH 11 FFILE FELEMENT 12 FINT 13 FSTATUSID 14 15 TEN TAM TDS TERROR 16 17 Reserved 18 TADDRESS 19 TLENGTH TADDRESS (HI BYTE) 20 TFILE 21 TELEMENT TINT 22 23 24 TSTATU
Chapter 4 Ladder-Program Interfaces Table 4.C Fields for the Physical Structure of the VME Status File Word Code Function Explanation 62 FEN From-VME enabled If 1, the continuous-copy-from-VME operation is enabled (active when in run mode). 62 FAM From-VME address modifier If 0, the continuous-copy-from-VME operation uses the 2D VMEbus address modifier (A16); if 1, it uses 3D (A24).
Chapter 4 Ladder-Program Interfaces Word Code Function Explanation 153 TDS To-VME data size If 0, the continuous-copy-to-VME operation does D16 VMEbus transfers; if 1, it does D08(EO) transfers. 153 TERROR To-VME error code If nonzero, refer to NO TAG for the most-recent error. 173 TADDRESS (HI BYTE) Meaningful only if TAM=1 Address bits 23-16 of the address of the first byte of the VMEbus destination .
Chapter 5 Commands Chapter Objectives Read this chapter to understand the command interface to the PLC-5/VME processor. The orientation of this chapter is based on a driver program running on a separate CPU module communicating with the processor. Unless otherwise noted, all multiple-byte numerical fields are represented in big-endian (Motorola) format, meaning that the most-significant data byte appears in the lowest-addressed byte.
Chapter 5 Commands Continuous-Copy Commands The command: Has the value of: Configures the PLC-5/VME processor to copy a block of data: Continuous copy to VME 0001 from its data table during each ladder scan. Continuous copy from VME 0002 into its data table during each ladder scan. See Appendix A for a sample implementation of this command. You can only enable these operations when the PLC-5/VME processor is in Run mode. You can specify up to 1000 words as the transfer length.
Chapter 5 Commands Word Command Description 0 Command word Has value 0001H (to VME) or 0002H (from VME). 1 Response word As defined previously for all commands in common. See page 3-9. 2 Command interrupt level As defined previously for all commands in common. See page 3-9. 3 Command interrupt status/ID As defined previously for all commands in common. See page 3-9.
Chapter 5 Commands Copy Synchronization The PLC-5/VME processor does not have the same programmable synchronization control as does the 6008-LTV processor. The 6008-LTV processor allows the copy transfer to: happen before or after the I/O update during housekeeping be asynchronous or synchronous with the ladder scan In other words, the ladder scan would keep going (regardless of whether the VME transfer finished or not) rather than holding until the transfer is complete.
Chapter 5 Commands Table 5.A Error Codes Handle-Interrupts Command Code Explanation 01H VMEbus transfer error (VMEbus bus error) 07H Bad data address 09H Past end of data file FDH Length specified as 0 or too large FEH Last end-of-copy interrupt not acknowledged This command, whose command word has the value 0003, defines the VME interrupts to be handled by the PLC-5/VME processor (Figure 5.2). Figure 5.
Chapter 5 Commands Word Command Description 0 Command word Has value 0003H 1 Response word As defined previously for all commands in common, see page 3-9. 2 Command interrupt level As defined previously for all commands in common, see page 3-9. 3 Command interrupt status/ID As defined previously for all commands in common, see page 3-9. 7 Enable If 0, handling of the specified interrupt (op interrupt level) is disabled. If 1, handling of the specified interrupt is enabled.
Chapter 5 Commands Send-PCCC Command This command, whose command word has the value FFFF, sends an Allen-Bradley Programmable Controller Communications Command. In the 6008-LTV processor, this was known as the “selective command.” See Appendix A for a sample implementation of this command. Figure 5.
Chapter 5 Commands Command-Protocol Error Codes Response-Word Error Codes 5-8 These are the command-protocol codes placed in the error-code field of the command-control register when the ERR bit is 1.
6 Chapter PLC-5/VME Processor Communications Commands Chapter Objectives Read this chapter to understand the function of the extended PCCCs in the PLC-5/VME processor. Important: Numerical data in the extended PCCCs is defined in little-endian (Intel) format. See the Data Highway / Data Highway Plus / DH-485 Communication Protocol and Command Set reference manual, publication number 1770-6.5.16, for more information on PCCC commands.
Chapter 6 PLC-5/VME Processor Communications Commands A PCCC reply packet has the following format: Bit 7 0 1 2 3 4 Byte 5 6 7 8 9 10 11 11/12 6 5 4 3 2 1 0 LNH - first byte LNH - second byte Reserved (DST) Reserved (PSN) Reserved (SRC) Reserved (PSN) 0 1 0 0 COMMAND REMOTE ERROR 0 TNS – first byte TNS – second byte OPTIONAL EXTENDED STATUS (EXT STS) OPTIONAL DATA (up to 243 bytes) Command Description LNH Length of the optional portion of the reply packet in bytes.
Chapter 6 PLC-5/VME Processor Communications Commands Supported PCCCs All PCCCs supported by the PLC-5 processor are supported by the PLC-5/VME processor. Since only a subset are useful to driver programs, only the useful subset and the PCCCs compatible with the “selective commands” of the 6008-LTV processor are described here.
Chapter 6 PLC-5/VME Processor Communications Commands Header Bit/Byte Descriptions Table 6.A describes the bytes that compose the headers of command and reply packets. We do not repeat their descriptions in the description of each command that follows. Important: All numbers are decimal except where noted by an “H” for Hexadecimal. Table 6.A Command and Reply Packets Header Bytes Function Description CMD Command CMD and FNC bytes together define the command to be executed.
Chapter 6 PLC-5/VME Processor Communications Commands Echo Use this command to debug or test PCCC transmission capability. The command packet can contain up to 243 bytes of data. The processor simply returns (“echos”) the same data in the reply packet.
Chapter 6 PLC-5/VME Processor Communications Commands Identify Host and Status Use this command to: diagnostic command when debugging your host CPU’s driver program confirm communication with the specified PLC-5/VME processor identify its operating mode report other useful information before initiating an upload or download Message Format Command Packet DST 00 PSN 00 SRC 00 PSN 00 CMD 06 STS 00 DST 00 PSN 00 SRC 00 PSN 00 TNS FNC 03 Reply Packet LNH Hi LNH Lo CMD 46H STS TNS STATUS (36 b
Chapter 6 PLC-5/VME Processor Communications Commands Byte Description 12,13 Number of data files used (highest assigned file number + 1) (low byte first) 14, 15 Number of program files used (highest assigned file number + 1) (low byte first) 16 Forcing status Bit 0 0 = no forces active 1 = forces active Bit 4 0 = no forces present 1 = forces present 0 = memory not protected any bit set = memory is protected 0 = RAM valid any bit set = invalid RAM All other bits = 0 17 Memory protect Bits
Chapter 6 PLC-5/VME Processor Communications Commands Refer to page D-3 for additional information on PCCC status codes. Sample API Module For a sample interface header file: Refer to page: P40VIHAS.H Read-Modify-Write For a sample implementation source file: B-64 P40VIHAS.C Refer to page: B-67 Use this command to set or reset specified bits in specified words of data table memory.
Chapter 6 PLC-5/VME Processor Communications Commands See the “Header Bit/Byte Descriptions” section on page 6-4 for descriptions of all bytes except the following: Use the: To specify: PLC-5/VME processor the address of the element(s) to be modified. You can use the 242-byte ADDR field address/mask field to modify selected words in and between data files. AND mask (2-bytes field) which bits are reset to 0 in the addressed word.
Chapter 6 PLC-5/VME Processor Communications Commands Sample API Module For a sample interface header file: Refer to page: P40VRMW.H Typed Read B-75 For a sample implementation source file: P40VRMW.C Refer to page: B-76 This command lets the host CPU read file data from the PLC-5/VME processor one packet at a time, starting at a specified address plus offset. Your driver program must: re-issue the command for each packet the number of times required to complete the total transaction.
Chapter 6 PLC-5/VME Processor Communications Commands Important: The PLC-5/VME processor ADDR, OFFSET, and TOTAL TRANS fields work together when the total number of words to be read requires multiple packets.
Chapter 6 PLC-5/VME Processor Communications Commands Data Types Data types are those resident in the PLC-5/VME processor. In the typed-write and typed-read commands described in this chapter, each data type has a code representing its ID. The data-type code is stored in byte field “a” of the command or reply. Some data types have a corresponding size. The data-type size is the number of bytes required to store one element of the data type.
Chapter 6 PLC-5/VME Processor Communications Commands Data-Type Field The data-type field specifies the ID (type of data) and size (number of bytes per element) of the data type used in these typed-write and typed-read commands. The default data-type field (1 byte) contains an ID format bit and value field for defining ID and size.
Chapter 6 PLC-5/VME Processor Communications Commands Integer Example The first byte is the data-type field (field a), the 2-byte element contains the data (field b). Bit 76543210 a 01001010 ID = 4 for integer Size = 2 bytes per element b 00000010 LS 00000000 MS value = 254 Floating-Point Example The first two bytes are the data-type field (field a), the 4-byte element contains the data (field b) which is single precision IEEE.
Chapter 6 PLC-5/VME Processor Communications Commands Counter Example The first byte is the data-type field (field a), the 6-byte element contains the data (field b).
Chapter 6 PLC-5/VME Processor Communications Commands Array Example The array includes two ID descriptors, the first specifies the structure as an array and its total length, the second specifies the type of data in the array and the number of bytes per element. You must count the second descriptor as part of the data field. Important: Select the array structure when transferring multiple elements of the same data type.
Chapter 6 PLC-5/VME Processor Communications Commands Example of Character String The first byte(s) are the descriptor (field a), followed by the character string (field b). The string is not NULL determined.
Chapter 6 PLC-5/VME Processor Communications Commands Typed Write This command lets the host CPU write file data to the PLC-5/VME processor one packet at a time starting at a specified address plus packet offset. Your driver program must: re-issue the command for each packet the number of times required to complete the total transaction. manipulate the offset field to place data of each packet in the correct destination location.
Chapter 6 PLC-5/VME Processor Communications Commands Important: The PLC-5/VME processor ADDR, OFFSET, and TOTAL TRANS fields work together when the total number of words to be written requires multiple packets.
Chapter 6 PLC-5/VME Processor Communications Commands Set CPU Mode Use this command to set PLC-5/VME processor’s operating mode. A no-privilege error is returned if the requester does not have the privilege of placing the host in a download mode.
Chapter 6 PLC-5/VME Processor Communications Commands Error Codes The STS byte contains 00H if no error. When detected, the PLC-5/VME processor reports errors in its reply packet as follows: STS EXT STS 00H – F0H 0CH Description No error Resource not available—someone else already holds the edit resource or has set the remote lockout bit Refer to page D-3 for additional information on PCCC status codes. Sample API Module For a sample interface header file: P40VSCM.
Chapter 6 PLC-5/VME Processor Communications Commands Message Format Command Packet DST 00 PSN 00 SRC 00 PSN 00 CMD 0F STS 00 DST 00 PSN 00 SRC 00 PSN 00 TNS FNC 53H Reply Packet LNH Hi LNH Lo CMD 4FH STS TNS EXT STS Memory Segment Pointers Memory Segment Pointers Upload/download Segments 1 byte 8 bytes LNG Segment 1 Start Pointer End Pointer Segment Identifier Compare Segments Segment X Segment 2 Start Pointer End Pointer 1 byte 8 bytes LNG Segment 1 Start Pointer End Pointer
Chapter 6 PLC-5/VME Processor Communications Commands Download All Request Use this command to place the PLC-5/VME processor in download mode before downloading memory. This command clears PLC-5/VME processor memory and loads default program files 0 and 1 (ladder), and data files 0, 1, and 2 (I/O and status). See the “Header Bit/Byte Descriptions” section on page 6-4 for a description of each byte. For a complete description of the download algorithm, see page 6-34.
Chapter 6 PLC-5/VME Processor Communications Commands Upload Complete Use this command at the completion of an upload to return the PLC-5/VME processor to its pre-upload operating mode. If the upload was initiated with the PLC-5/VME processor in program mode, now your driver program can change the operating mode to run or Run/Program to resume processor operation. See the “Header Bit/Byte Descriptions” section on page 6-4 for a description of each byte.
Chapter 6 PLC-5/VME Processor Communications Commands Download Complete Use this command to return the PLC-5/VME processor from download/program to Program mode after downloading memory. Now, your driver program can change the PLC-5/VME processor’s operating mode to run or Run/Program to resume processor operation. See the “Header Bit/Byte Descriptions” section on page 6-4 for a description of each byte.
Chapter 6 PLC-5/VME Processor Communications Commands Read Bytes Physical Use this command to upload segments of PLC-5/VME processor memory after a successful upload-all-requests command. You can upload up to 244 bytes (122 words) per packet. Words are loaded low byte first. The first byte and the number of bytes read must be an even number. Your upload PLC-5/VME processor memory uses successive read bytes physical commands for each of three memory segments.
Chapter 6 PLC-5/VME Processor Communications Commands Error Codes The STS byte contains 00H if no error.
Chapter 6 PLC-5/VME Processor Communications Commands Message Format Command Packet DST 00 PSN 00 SRC 00 PSN 00 CMD 0F STS 00 TNS FNC 18H a b a – The physical address is a four-byte field (order of bytes is lowest to highest) where the current packet starts to write. For example, 00 0A 00 00. b – You can write up to 119 data words (two bytes per word) per command packet (enter low byte first).
Chapter 6 PLC-5/VME Processor Communications Commands Get Edit Resource Use this command to secure the edit resource for the programming device. Once you have obtained the edit resource, no one else can write to or modify the device.
Chapter 6 PLC-5/VME Processor Communications Commands Return Edit Resource Use this command to return the edit resource when editing is completed. When you return the edit resource, the programming device can be written to or modified.
Chapter 6 PLC-5/VME Processor Communications Commands Apply Port Configuration Use this command to change the configuration of some or all ports. No parameters means to change all ports. This command reconfigures the ports based on information in the processor’s physical memory. It is normally used as part of a physical download operation where the processor memory and configuration are to be fully restored. You must have the edit resource to use this command. Command Parameters 1. 2.
Chapter 6 PLC-5/VME Processor Communications Commands Operation Active Port Configuration Processor Memory Port-Configuration Information This command applies the port-configuration information that exists in physical memory to the chips that control the I/O ports. This makes it possible to restore the I/O ports to the state that they were in during full physical memory restore operations (i.e., download all request). Sample API For a sample interface header file: P40VAPC.
Chapter 6 PLC-5/VME Processor Communications Commands Message Format Command Packet DST 00 PSN 00 SRC 00 PSN 00 CMD 0F STS 00 TNS FNC 90H a b a – The number of ports to change is a one-byte field—00 means “all ports.” b – Port numbers in this list are two bytes each, low byte first. Reply Packet LNH Hi LNH Lo DST 00 PSN 00 SRC 00 PSN 00 CMD 4FH STS 00 TNS EXT STS Error Codes STS EXT STS 00H – Description No error Refer to page D-3 for additional information on PCCC status codes.
Chapter 6 PLC-5/VME Processor Communications Commands Upload and Download Procedure The upload-and-download procedure is a PLC-5/VME processor physical save-and-restore procedure that uploads and downloads a binary image from a PLC-5 processor out of and into VME memory. Upload Procedure An example of this procedure is included in Appendix A. 1. Identify the PLC-5/VME processor. 2. Set the processor’s operating mode to Program or Remote Program.
Chapter 6 PLC-5/VME Processor Communications Commands d. Calculate the number of full physical reads that will be done from the processor during the upload operation. The maximum number of bytes is 244 for a physical read. We will use 238 bytes in this example because that is the maximum for physical write operations—this makes it easier to download the processor’s memory in the future. This is an integer division calculation: fullReadCount = segmentSize / 238 e.
Chapter 6 PLC-5/VME Processor Communications Commands Download Procedure An example of this procedure is included in Appendix A. 6-36 1. Identify the PLC-5/VME processor. 2. Set the processor’s operating mode to Program or Remote Program. You can do this by using the PCCC command Set CPU Mode described on page 6-20. 3. Clear all faults in the processor. You can determine whether or not a processor has faults by using the PCCC command Identify Host and Status described on page 6-6. 4.
Chapter 7 Performance and Operation Chapter Objectives Read this chapter to learn about the performance and theory of operations of the PLC-5/VME processor. VME Throughput Time The PLC-5/VME is a standard PLC-5 processor with an embedded VME coprocessor that uses standard port 3A for coprocessor communication.
Chapter 7 Performance and Theory of Operations For the check-VME-status-file command, If you want the VME: Set the NOCV bit to: to check the VME status file for changes during every program scan zero. Important: This causes the performance of message instruction transfers to degrade by a factor of 2 or greater. not to check the VME status file one. You can still check the VME status file by issuing the “check VME status file” command using the message instruction “CSF.
Chapter 7 Performance and Theory of Operations The PLC scan-time impact for either a read or write transfer with the dual-port memory can be calculated as: Transfer time = 22.41µs + (2.332µs)N + 0.83µs(N–1) Where: Is the: 22.41µs dual port set-up time (2.332µs)N dual port access per word 0.83µs(N–1) VME coprocessor loop time N number of words to transfer Note: a transfer of 100 words = 337.
Chapter 7 Performance and Theory of Operations Benchmark Tests The benchmark tests that we ran show approximately how long it takes to perform a ladder-logic message instruction. This means the total elapsed time from when the enable bit of the instruction went true until the done bit went true. But the time it takes the data to get to the VMEbus in a write instruction may actually be a little less than the elapsed time between the enable and done bits.
Chapter 7 Performance and Theory of Operations Due to the different loading that can be placed on the communication processor in the PLC/5 processor, transfer times are not consistent every time. For each test, 20 readings were taken to calculate the numbers. We present the minimum, maximum, and average values.
Chapter 7 Performance and Theory of Operations Setup #3 NOCV = 1 (VME coprocessor does not constantly read PLC processor) Copy to global VME RAM off-board the PLC processor at 0x70000 Programming terminal attached to PLC processor monitoring ladder file Command Minimum msec. Maximum msec. Average msec. CTV #N7:0 70000 D16 1 4.0 16.0 6.0 CTV #N7:0 70000 D16 500 7.0 18.0 10.0 CTV #N7:0 70000 D16 1000 11.0 21.0 13.0 CFV 70000 D16 #N7:0 1 5.0 15.0 7.0 CFV 70000 D16 #N7:0 500 8.0 19.0 11.
Chapter 7 Performance and Theory of Operations Setup #5 NOCV = 0 (VME coprocessor constantly read PLC processor) Copy to global VME RAM on-board the PLC processor at 0xA00000 Programming terminal attached to PLC processor monitoring ladder file Command Minimum msec. Maximum msec. Average msec. CTV #N7:0 A0000 D16 1 6.0 20.0 10.0 CTV #N7:0 A0000 D16 500 10.0 27.0 16.0 CTV #N7:0 A0000 D16 1000 114.0 25.0 18.0 CFV A0000 D16 #N7:0 1 6.0 20.0 10.0 CFV A0000 D16 #N7:0 500 10.0 22.0 15.
Chapter 7 Performance and Theory of Operations Program Scanning Logic Scan Housekeeping The program scan cycle is the time it takes the processor to execute the logic scan once, perform housekeeping tasks, and then start executing logic again. The processor continually performs logic scanning and housekeeping. In a PLC-5/V40, for example, basic housekeeping takes 3.2 ms. If it takes the processor 21.8 ms to execute a logic scan, the overall program scan cycle is 25 ms.
Chapter 7 Performance and Theory of Operations Effects of False versus True Logic on Scan Time The rung below—which changes states from one program scan to the next—will change your scan time by about 400 ms. LN NATURAL LOG Source I:000 00 Dest N7:0 5 F8:20 1.609438 If I:000/00 is: Then the rung is: On true and the processor calculates the natural log. A natural-log instruction takes 409 µs to execute Off false and the processor scans the rung but does not execute it. It takes only 1.
Chapter 7 Performance and Theory of Operations If I:000/02 is: Rungs 2 and 3 are: On Skipped Off Executed If you use subroutines, program scan times can vary by the scan time of entire logic files. Effects of Using Interrupts on Program Scan Time Program scan time is also affected by interrupt programs. An interrupt is a special situation that causes a separate program to run independent of the normal logic scan. You define the special event and the type of interrupt that is to occur.
Chapter 7 Performance and Theory of Operations I/O Scanning The remote I/O scan cycle is the time that it takes for the processor (configured as a scanner) to communicate with all of the entries in its rack scan-list once. The remote I/O scan is independent of and asynchronous to the program scan. The scanner processor keeps a list of all of the devices connected to each remote I/O link.
Chapter 7 Performance and Theory of Operations Figure 7.
Chapter 7 Performance and Theory of Operations Extended-Local I/O Processors that have extended-local I/O capability scan the extended-local I/O chassis (on channel 2) during the housekeeping portion of the program scan. Extended-local I/O discrete data is exchanged between the processor data-table image and the I/O in the extended-local I/O chassis. The time that it takes to scan extended-local I/O chassis is added to the housekeeping time. See Figure 7.2. Figure 7.
Chapter 7 Performance and Theory of Operations Figure 7.
Chapter 7 Performance and Theory of Operations Block-transfer duration is the time interval between the enabling of the block-transfer instruction and the receipt of the done bit. The following example and formulas make two assumptions: block-transfer instructions are consecutively placed in the logic program block-transfer modules in the I/O chassis are ready to perform when operations are requested The following example sets up a system and provides two formulas for calculating block-transfer timing.
Chapter 7 Performance and Theory of Operations Formula 1—Worst-case time to complete all block-transfers in extended-local I/O system where block-transfer duration (in ms) = D x R D = 2E x L + (0.1W) Where: Is the: E number of extended-local chassis with block-transfer modules L largest number of block-transfer modules in any extended-local I/O chassis W number of words in the longest block-transfer request D (ms) = (2 x 2) x (2) + (0.
Chapter 7 Performance and Theory of Operations In this example, R = 1 because the value of D (6 ms) < 15 ms logic scan time block-transfer duration (ms) = 6 x 1 or 6 ms The block-transfer duration shown above does not affect logic scan time. This transfer of data occurs concurrent with execution of program logic. Remote I/O The processor performs block transfers asynchronously to the program scan. The processor also interrupts the program scan asynchronously to momentarily access BTW and BTR data files.
Appendix A Sample Applications Appendix Objectives Read this appendix to understand how to write applications in a separate VMEbus CPU to interact with your PLC-5/VME processor. The following programs are C-language programs that interact with the PLC-5/VME processor from a separate CPU. The details of these programs vary depending on the CPU, operating system, and C-complier used. These specific programs run on RadiSys Corporation VMEbus EPC (PC compatible) CPUs.
Appendix A Sample Applications VMEDEMO.CPP /***************************************************************************/ /****************************** INCLUDE FILES ******************************/ /***************************************************************************/ #include #include #include #include #include #include #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vcco.
Appendix A Sample Applications /***************************************************************************/ /********************* PRIVATE FUNCTIONS DEFINITIONS ***********************/ /***************************************************************************/ void display_status(PLC540V_STATUS_TYPE *status); void test_init_cc_to_vme(void); void test_halt_cc_to_vme(void); void test_init_cc_from_vme(void); void test_halt_cc_from_vme(void); void test_disable_slave_memory(void); void test_enable_slave_mem
Appendix A Sample Applications // Goodbye clrscr(); gotoxy(0, 0); return(0); } /***************************************************************************/ /*************************** PRIVATE FUNCTIONS *****************************/ /***************************************************************************/ /***************************************************************************/ /********************************** GO ************************************/ /******************************************
Appendix A Sample Applications // Process the user’s selection switch(menuChoice) { case 1: // Initiate a continuous copy operation from a PLC data file // to VME memory. test_init_cc_to_vme(); break; case 2: // Stop a previously initiated continuous copy operation from // a PLC data file to VME memory. test_halt_cc_to_vme(); break; case 3: // Initiate a continous copy operation from VME to a PLC data // file.
Appendix A Sample Applications /***************************************************************************/ /******************************* SHOW_ERROR *******************************/ /***************************************************************************/ void show_error(char *str) { // This function will inform the user of an error. gotoxy(20, 16); highvideo(); cprintf(str); gotoxy(20, 17); cprintf(”Press the backspace key to continue...
Appendix A Sample Applications /***************************************************************************/ /****************************** TEST_PCCC_ID *******************************/ /***************************************************************************/ void test_pccc_id(void) { // This function will test the PCCC Id Host & Status command.
Appendix A Sample Applications /***************************************************************************/ /***************************** GET_KEY_MODE ********************************/ /***************************************************************************/ char *get_key_mode(int keyMode) { // Return a string which textually described the state of the key // switch on the PLC.
Appendix A Sample Applications plcList[0] = mem.baseAddr; // Turn on the memory on the PLC at the requested VME location. plc540v_enable_shared_memory(plcList[0], mem.
Appendix A Sample Applications // Get the continuous copy information from the user. clrscr(); gotoxy(0, 10); cprintf( ”Enter the VME command block address in hex (for the A24 addr space): ”); scanf(”%lx”, &cc_to.vmeCmdBlkAddr); gotoxy(0, 11); cprintf(”Enter the base address for the PLC–5/40V in hex: ”); scanf(”%x”, &cc_to.baseAddr); gotoxy(0, 12); cprintf(”Enter the VME data address in hex (for the A24 addr space): ”); scanf(”%lx”, &cc_to.
Appendix A Sample Applications // Stop the continuous copy opeation... plc540v_halt_cont_copy_to_VME( cc_to.vmeDataAddr, cc_to.wordCount, cc_to.vmeCmdBlkAddr, cc_to.baseAddr, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, cc_to.fileNumber, cc_to.
Appendix A Sample Applications // Initiate the continuous copy from VME to a PLC data file plc540v_init_cont_copy_from_VME( cc_from.vmeDataAddr, cc_from.wordCount, cc_from.vmeCmdBlkAddr, cc_from.baseAddr, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, cc_from.fileNumber, cc_from.
Appendix A Sample Applications /***************************************************************************/ /***************************** DISPLAY_STATUS ******************************/ /***************************************************************************/ void display_status(PLC540V_STATUS_TYPE *status) { // This function determines if the status was an error. If so, it will // display a specific error type to the screen.
Appendix A Sample Applications EXE_dependencies = \ p40vihas.obj \ common.obj \ p40vcco.obj \ p40vspcc.obj \ vmedemo.obj \ {$(LIBPATH)}bmclib.lib # *Explicit Rules* vmedemo.exe: vmedemo.cfg $(EXE_dependencies) $(TLINK) /v/x/n/P–/L$(LIBPATH) @&&| c0l.obj+ p40vihas.obj+ common.obj+ p40vcco.obj+ p40vspcc.obj+ vmedemo.obj vmedemo # no map file bmclib.lib+ emu.lib+ mathl.lib+ cl.lib | # *Individual File Dependencies* p40vihas.obj: vmedemo.cfg p40vihas.c common.obj: vmedemo.cfg common.c p40vcco.obj: vmedemo.
Appendix A Sample Applications # *Compiler Configuration File* vmedemo.cfg: vmedemo.mak copy &&| –ml –v –y –vi –w–ret –w–nci –w–inl –wpin –wamb –wamp –w–par –wasm –wcln –w–cpt –wdef –w–dup –w–pia –wsig –wnod –w–ill –w–sus –wstv –wucp –wuse –w–ext –w–ias –w–ibc –w–pre –w–nst –I$(INCLUDEPATH) –L$(LIBPATH) –P | vmedemo.cfg UPLOAD.
Appendix A Sample Applications // PLC-5/40V is using ULA0 which is 0xFC00 const unsigned short kplc540vUla = 0xFC00; // This is the number of bytes to be read from the PLC-5/40V.
Appendix A Sample Applications /***************************************************************************/ /******************************* MAINLINE **********************************/ /***************************************************************************/ /***************************************************************************** * * PURPOSE: This is the main function for the upload demonstration * program.
Appendix A Sample Applications // Open the output file for saving PLC memory. if ((out = fopen(argv[1], ”w+b”)) == NULL) { printf(”\n\nFailed to open %s file”, argv[1]); exit(1); } // Make certain the processor is in remote program mode plc_in_remote_program_mode(); // Make certain there are no faults... check_for_faults(); // Get the edit resource from the processor. get_edit_resource(); // Ensure that the current port configuration will be saved in the // physical image.
Appendix A Sample Applications printf(”\n\nFinal Address: 0x%08.8lx”, readAddr + finalPhysicalReadSize); } // Close the output file fclose(out); // Upload Complete command. upload_is_complete(); // Return the edit resource to the processor. return_edit_resource(); printf(”\n\nUpload was successfully completed.
Appendix A Sample Applications plc540v_pccc_return_edit_resource(kvmeSlaveAddress, kplc540vUla, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, &replyPacket, &status); if(status.plc540vStatus != 0) { printf(”\nReturning the edit resource failed.
Appendix A Sample Applications else { if (replyPacket.plcStatus.keyswitchMode!=kPLC540V_REMOTE_PROGRAM_LOAD) { printf(”\nPLC is not in remote program mode.”); printf(”\n\tAttempting to change its mode to program load...”); plc540v_pccc_set_cpu_mode(kvmeSlaveAddress, kplc540vUla, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, ctlMode, &scmReplyPacket, &status); if (status.plc540vStatus != 0) { printf(” FAILED”); exit(1); } else printf(” OK...
Appendix A Sample Applications /***************************************************************************/ /************************** EXTRACT_START_POINTER **************************/ /***************************************************************************/ unsigned long extract_start_pointer(char far *data) { // This function will extract the starting pointer to the segment.
Appendix A Sample Applications /***************************************************************************/ /************************ CALC_FINAL_PHYS_READ_SIZE ************************/ /***************************************************************************/ unsigned short calc_final_phys_read_size(unsigned long segmentSize) { // Returns the number of bytes we will need to read to get the // last remaining bytes of memory.
Appendix A Sample Applications printf(”\n\tSegment 1 Start Pointer: %x %x %x %x”, replyPointer->optionalData[1], replyPointer->optionalData[2], replyPointer->optionalData[3], replyPointer->optionalData[4]); printf(”\n\tSegment 1 End Pointer: %x %x %x %x”, replyPointer->optionalData[5], replyPointer->optionalData[6], replyPointer->optionalData[7], replyPointer->optionalData[8]); printf(”\n\tCompare 1 lng: %x”, replyPointer->optionalData[9]); printf(”\n\tCompare 1 Start Pointer: %x %x %x %x”, replyPointer->o
Appendix A Sample Applications // Save this read address in the file packet filePacket.plcAddress = readAddr; // Save this read length in the file packet filePacket.plcDataLength = readSize; // Save the plc data into the file packet memmove((char *) &filePacket.plcData, (char *) &replyPacket.
Appendix A Sample Applications UPLOAD.MAK .AUTODEPEND # *Translator Definitions* CC = bcc +UPLOAD.CFG TASM = TASM TLIB = tlib TLINK = tlink LIBPATH = C:\BORLANDC\LIB INCLUDEPATH = C:\BORLANDC\INCLUDE # *Implicit Rules* .c.obj: $(CC) -c {$< } .cpp.obj: $(CC) -c {$< } # *List Macros* EXE_dependencies = \ p40vula.obj \ p40vulc.obj \ p40vrbp.obj \ p40vihas.obj \ p40vrpc.obj \ p40vrer.obj \ p40vger.obj \ common.obj \ p40vspcc.obj \ p40vscm.obj \ upload.obj \ {$(LIBPATH)}bmclib.lib # *Explicit Rules* upload.
Appendix A Sample Applications p40vihas.obj: upload.cfg p40vihas.c p40vrpc.obj: upload.cfg p40vrpc.c p40vrer.obj: upload.cfg p40vrer.c p40vger.obj: upload.cfg p40vger.c common.obj: upload.cfg common.c p40vspcc.obj: upload.cfg p40vspcc.c p40vscm.obj: upload.cfg p40vscm.c upload.obj: upload.cfg upload.cpp # *Compiler Configuration File* upload.cfg: upload.
Appendix A Sample Applications #include #include #include #include #include #include #include #include #include #include ”busmgr.h” ”pccc.h” ”p40vger.h” ”p40vrer.h” ”p40vapc.h” ”p40vwbp.h” ”p40vihas.h” ”p40vdla.h” ”p40vdlc.h” ”p40vscm.
Appendix A Sample Applications /***************************************************************************** * * PURPOSE: This is the main function for the download demonstration * program. This program implements the algorithm to * successfully restore the entire physical processor memory of * the PLC-5/40V from a disk file on the Radisys EPC-4. Please * note that this implementation will also restore the saved * port configurations. * * INPUT: You must supply a filename on the command line.
Appendix A Sample Applications // Make certain the processor is in remote program mode plc_in_remote_program_mode(); // Make certain there are no faults... check_for_faults(); // Issue the download all request. download_all(); // Let’s read the file ”bucket”... memset((char *) &filePacket, 0x0, sizeof(FILE_PACKET_TYPE)); // Now let’s attempt to read the first filePacket... moreFilePackets = fread((char *) &filePacket, 1, sizeof(FILE_PACKET_TYPE), in); // While there are filePackets to process...
Appendix A Sample Applications plc540v_pccc_get_edit_resource(kvmeSlaveAddress, kplc540vUla, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, &replyPacket, &status); if(status.plc540vStatus != 0) { printf(”\nGetting the edit resource failed.
Appendix A Sample Applications /***************************************************************************/ /********************** PLC_IN_REMOTE_PROGRAM_MODE *************************/ /***************************************************************************/ void plc_in_remote_program_mode(void) { PLC540V_PCCC_IHAS_RPY_TYPE replyPacket; PLC540V_PCCC_SCM_RPY_TYPE scmReplyPacket; PLC540V_STATUS_TYPE status; PLC540V_PCCC_SCM_CTLMODE_TYPE ctlMode; ctlMode.
Appendix A Sample Applications if (status.plc540vStatus != 0) { printf(”\nChecking the PLC for faults failed.”); exit(1); } else { // Check for major faults... if (replyPacket.plcStatus.majorFault != 0) { printf(”\nProcessor has major faults so we cannot continue.”); exit(1); } // Check for bad RAM... if (replyPacket.plcStatus.ramInvalid != 0) { printf(”\nProcessor has bad RAM so we cannot continue.
Appendix A Sample Applications PLC540V_PCCC_DLC_RPY_TYPE replyPacket; PLC540V_STATUS_TYPE status; plc540v_pccc_download_complete(kvmeSlaveAddress, kplc540vUla, kVME_D16_DATA_WIDTH, kVME_A24_ADDR_SPACE, &replyPacket, &status); if(status.plc540vStatus != 0) { printf(”\nDownload Complete command failed.
Appendix A Sample Applications EXE_dependencies = \ p40vdla.obj \ p40vdlc.obj \ p40vwbp.obj \ p40vihas.obj \ p40vapc.obj \ p40vrer.obj \ p40vger.obj \ common.obj \ p40vspcc.obj \ download.obj \ {$(LIBPATH)}bmclib.lib \ p40vscm.obj # *Explicit Rules* download.exe: download.cfg $(EXE_dependencies) $(TLINK) /v/x/n/P-/L$(LIBPATH) @&&| c0l.obj+ p40vdla.obj+ p40vdlc.obj+ p40vwbp.obj+ p40vihas.obj+ p40vapc.obj+ p40vrer.obj+ p40vger.obj+ common.obj+ p40vspcc.obj+ download.obj+ p40vscm.
Appendix A Sample Applications # *Compiler Configuration File* download.cfg: download.mak copy &&| -ml -v -y -vi -w-ret -w-nci -w-inl -wpin -wamb -wamp -w-par -wasm -wcln -w-cpt -wdef -w-dup -w-pia -wsig -wnod -w-ill -w-sus -wstv -wucp -wuse -w-ext -w-ias -w-ibc -w-pre -w-nst -I$(INCLUDEPATH) -L$(LIBPATH) -P | download.
B Appendix Sample Application Programming Interface Modules Appendix Objectives Read this appendix to understand how to write an application programming interface (API) module to interact with your PLC-5/VME processor. The modules in this appendix are C-language programs that interact with the PLC-5/VME processor.
Appendix B Sample API Modules For this header file: Refer to page: For this source file: Refer to page: COMMON.H B-3 COMMON.C B-5 P40VCCO.H B-17 P40VCCO.C B-18 PCCC.H B-30 PCCC.C B-32 P40VHINT.H B-32 P40VHINT.C B-33 P40VSPCC.H B-39 P40VSPCC.C B-40 P40VWBP.H B-43 P40VWBP.C B-44 P40VAPC.H B-46 P40VAPC.C B-47 P40VULC.H B-49 P40VULC.C B-50 P40VDLA.H B-52 P40VDLA.C B-53 P40VDLC.H B-55 P40VDLC.C B-56 P40VECHO.H B-58 P40VECHO.C B-59 P40VGER.H B-61 P40VGER.
Appendix B Sample API Modules COMMON.H #ifndef COMMON_H #define COMMON_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the COMMON USE THROUGHOUT THE API // /////////////////////////////////////////////////////////////////////////////// /* Macros to access the high and low word of an unsigned long.
Appendix B Sample API Modules typedef struct { /* Indicates which type of error status is being returned. three sources: EPC, PCCC or this library of routines.
Appendix B Sample API Modules ///////////////////////////////////////////////////////////////// // Common set of functions that are useful throughout the API...
Appendix B Sample API Modules /* Mask for the command control register’s error bit.
Appendix B Sample API Modules /* Loop until we timeout or the bits are set. */ for (i=0; ((iplc540vStatus == kPLC540V_SUCCESS)); i++) { read_plc540v_register(baseAddress, kPLC540V_CC_REG, &cmdctlReg, status); if (status->plc540vStatus == kPLC540V_SUCCESS) { /* Determine if the bit is set. */ if (cmdctlReg & andMask) break; } } if (i > kTIMEOUT_COUNT) { /* Signal that we timed out.
Appendix B Sample API Modules /* Let’s initialize the status variable to success. */ memset((char *) status, 0x0, sizeof(PLC540V_STATUS_TYPE)); /* Let’s loop through the range of base addresses and see if a PLC-5/40V is located. If one is found, then we will add it to the array.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will read a PLC-5/40V’s A16 configuration and * control register. * * INPUT: UWORD baseAddress will contain the base address of the * PLC-5/40V. * * PLC540V_REGISTER_TYPE targetRegister will contain the * particular PLC-5/40V register that will be read. * * OUTPUT: UWORD *registerValue will contain the value read from the * specified target register.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will write to a PLC-5/40V’s A16 configuration or * control register. * * INPUT: UWORD baseAddress will contain the base address of the * PLC-5/40V. * * PLC540V_REGISTER_TYPE targetRegister will contain the * particular PLC-5/40V register that will be written. * * UWORD registerValue will contain the value to be written * to the specified target register.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will determine if a PLC-5/40V has successfully * completed its startup diagnostics validation routine. The * PLC-5/40V’s STATUS/CONTROL register contains two flag bits: * RDY and PASSED. If both of these are asserted (high), * then the PLC-5/40V has passed its internal self-test.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will continually poll the command block’s * response word to determine when the PLC-5/40V has completed * processing a command. When the response word becomes * non-zero OR if we time out then this function will return * to the caller. * INPUT: ULONG vmeCmdBlkAddr contains the VME address of the command * block.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will transmit notification of a new command * block awaiting processing by the PLC-5/40V. Prior to calling * this function, the programmer must copy the command block * into VME memory. * * INPUT: ULONG baseAddress contains the base address of the PLC-5/40V. * * ULONG vmeCmdBlkAddr contains the VME address of the command * block.
Appendix B Sample API Modules /* The PLC-5/40V’s command/control register WRITE-READY bit indicates when it is ready to accept a new command. We will poll this bit until it is set or we timeout. */ poll_plc540v_cmdctrl_bits(baseAddress, kCMDCTRL_WRDY, status); if (status->plc540vStatus == kPLC540V_SUCCESS) { /* The PLC-5/40V command word is 32 bits wide. However, the VME interface to the command word is only 16 bits wide so we must write the command word as two 16 bit chunks.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will enable the 64K of shared RAM that is * present on the PLC-5/40V. * * INPUT: ULONG baseAddress contains the base address of the PLC-5/40V. * * ULONG vmeSharedRAMAddr contains the VME address of the * shared ram on the PLC-5/40V that is * specified in the baseAddress field.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function will disable the 64K of shared RAM that is * present on the PLC-5/40V. * * INPUT: ULONG baseAddress contains the base address of the PLC-5/40V. * * ULONG vmeSharedRAMAddr contains the VME address of the * shared ram on the PLC-5/40V that is specified in the * baseAddress field.
Appendix B Sample API Modules P40VCC0.H #ifndef P40VCCO_H #define P40VCCO_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the CONTINUOUS COPY COMMAND STRUCTURE // /////////////////////////////////////////////////////////////////////////////// #include ”common.
Appendix B Sample API Modules void plc540v_halt_cont_copy_to_VME( ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status); void plc540v_init_cont_copy_from_VME( ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAdd
Appendix B Sample API Modules /***************************************************************************/ /************************* PRIVATE TYPE DEFINITIONS ************************/ /***************************************************************************/ typedef enum { kPLC540V_CONT_COPY_TO_VME=0x0001, kPLC540V_CONT_COPY_FROM_VME=0x0002, } PLC540V_CONT_COPY_COMMAND; typedef enum { kPLC540V_CONT_COPY_DISABLE=0x0, kPLC540V_CONT_COPY_ENABLE=0x1, } PLC540V_CONT_COPY_MODE; /****************************
Appendix B Sample API Modules * UWORD elementNumber contains the element number in the * PLC–5/40V data table file at which the data transfer is to * begin. * * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC–5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion. If kVME_NO_INT_LEVEL is specified, then * no VME bus interrupts will be generated.
Appendix B Sample API Modules void plc540v_init_cont_copy_to_VME(ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status) { plc540v_cont_copy(kPLC540V_CONT_COPY_TO_VME, kPLC540V_CONT_COPY_ENABLE, vmeDataAddr, vmeDataSize, vmeCmdBlkAdd
Appendix B Sample API Modules * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC–5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion. If kVME_NO_INT_LEVEL is specified, then * no VME bus interrupts will be generated. * * UBYTE cmdStatusId contains a unique value which will be used * by the interrupted host processor to run a specific * interrupt service routine.
Appendix B Sample API Modules void plc540v_halt_cont_copy_to_VME(ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status) { plc540v_cont_copy(kPLC540V_CONT_COPY_TO_VME, kPLC540V_CONT_COPY_DISABLE, vmeDataAddr, vmeDataSize, vmeCmdBlkAd
Appendix B Sample API Modules * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC–5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion. If kVME_NO_INT_LEVEL is specified, then * no VME bus interrupts will be generated. * * UBYTE cmdStatusId contains a unique value which will be used * by the interrupted host processor to run a specific * interrupt service routine.
Appendix B Sample API Modules void plc540v_init_cont_copy_from_VME(ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status) { plc540v_cont_copy(kPLC540V_CONT_COPY_FROM_VME, kPLC540V_CONT_COPY_ENABLE, vmeDataAddr, vmeDataSize, vmeCmdBl
Appendix B Sample API Modules * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC–5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion. If kVME_NO_INT_LEVEL is specified, then * no VME bus interrupts will be generated. * * UBYTE cmdStatusId contains a unique value which will be used * by the interrupted host processor to run a specific * interrupt service routine.
Appendix B Sample API Modules void plc540v_halt_cont_copy_from_VME(ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status) { plc540v_cont_copy(kPLC540V_CONT_COPY_FROM_VME, kPLC540V_CONT_COPY_DISABLE, vmeDataAddr, vmeDataSize, vmeCmdB
Appendix B Sample API Modules * UWORD fileNumber contains the PLC–5/40V data file number * which will be continuously read from for the data transfer. * * UWORD elementNumber contains the element number in the * PLC–5/40V data table file at which the data transfer is to * begin. * * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC–5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion.
Appendix B Sample API Modules static void plc540v_cont_copy(PLC540V_CONT_COPY_COMMAND ccCmd, PLC540V_CONT_COPY_MODE ccMode, ULONG vmeDataAddr, UWORD vmeDataSize, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, UWORD fileNumber, UWORD elementNumber, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatusId, PLC540V_STATUS_TYPE *status) { /* The continuous copy command block.
Appendix B Sample API Modules if (status–>plc540vStatus == kPLC540V_SUCCESS) { /* If sending the command block address didn’t fail, then the PLC–5/40V has started processing the command. If the user of this function hasn’t set up any VME interrupts to be generated, then we will poll the PLC–5/40V until the its done processing the command. This is indicated by a non–zero value in the response word of the command block. If the user has set up VME interrupts, then we will simply return to the caller.
Appendix B Sample API Modules /* ** ** Structure of the Send PCCC Command Block. ** any PCCC command to the PLC.
Appendix B Sample API Modules typedef struct { unsigned char lnhFirstByte; /* unsigned char lnhSecondByte; /* unsigned char dstRpyPkt; unsigned char psn1RpyPkt; unsigned char srcRpyPkt; unsigned char psn2RpyPkt; unsigned char command; /* unsigned char remoteError; /* unsigned short tns; unsigned char optionalData[243]; }PCCC_RPY_PKT_TYPE; reply packet length high */ reply packet length low */ /* Reserved */ /* Reserved */ /* Reserved */ /* Reserved */ packet command */ packet return code */ /* sequence nu
Appendix B Sample API Modules typedef struct { UWORD commandWord; UWORD responseWord; UWORD cmdIntLevel; UWORD cmdStatusId; UWORD reserved1[3]; PLC540V_HINT_TRANSFER_TYPE transferInfo; UWORD reserved2[5]; UWORD operationIntLevel; UWORD operationStatusId; UWORD reserved3; } PLC540V_HINT_CMD_TYPE; #pragma pack() void plc540v_init_handle_interrupts( ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE operationStatus
Appendix B Sample API Modules /***************************************************************************/ /*************************** PRIVATE FUNCTIONS *****************************/ /***************************************************************************/ static void plc540v_handle_interrupts( PLC540V_HINTS_COMMAND hintCmd, PLC540V_HINTS_MODE hintMode, ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_INTERRUPT_LEVEL_TYPE cmdIntLevel, UBYTE cmdStatusId, VME_INTERRUPT_LEVEL_TYPE operationIntLevel, UBYTE o
Appendix B Sample API Modules * plc540v_init_handle_interrupts( * vmeCmdBlkAddr, * baseAddress, * cmdIntLevel, * cmdStatusId, * operationIntLevel, * operationStatusId, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules * UBYTE operationStatusId contains a unique value which will * be used by the interrupted host processor to run a specific * interrupt service routine. This variable must be set to * zero if you are NOT using any operation interrupts. * * OUTPUT: PLC540V_STATUS_TYPE *status will contain the final status * of requesting this function. This status could be and EPC * or PLC-5/40V value. * * RETURNS: Nothing.
Appendix B Sample API Modules * VME_INTERRUPT_LEVEL_TYPE cmdIntLevel contains the VME bus * interrupt to be generated by the PLC-5/40V AFTER storing * its response in the response word of the command block AFTER * COMMAND completion. If kVME_NO_INT_LEVEL is specified, then * no VME bus interrupts will be generated. * * UBYTE cmdStatusId contains a unique value which will be used * by the interrupted host processor to run a specific * interrupt service routine.
Appendix B Sample API Modules /* Let’s initialize the status variable to success. */ memset((char *) status, 0x0, sizeof(PLC540V_STATUS_TYPE)); /* Build the command block. */ hintCmdBlk.commandWord = hintCmd; hintCmdBlk.responseWord = 0; hintCmdBlk.cmdIntLevel = cmdIntLevel; hintCmdBlk.cmdStatusId = cmdStatusId; hintCmdBlk.transferInfo.enable = hintMode; hintCmdBlk.operationIntLevel = operationIntLevel; hintCmdBlk.operationStatusId = operationStatusId; /* Copy the command block to VME memory.
Appendix B Sample API Modules P40VSPCC.H #ifndef P40VSPCC_H #define P40VSPCC_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the SEND PCCC COMMAND STRUCTURE // /////////////////////////////////////////////////////////////////////////////// #include ”pccc.
Appendix B Sample API Modules P40VSPCC.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vspcc.
Appendix B Sample API Modules * * VME_ADDRESS_MODIFIER_TYPE addrMod defines the address space * in which the VME data is accessed. It can be A16 or A24. * * OUTPUT: PLC540V_STATUS_TYPE *status will contain the final status * of requesting this function. This status could be and EPC * or PLC-5/40V value. * * RETURNS: Nothing.
Appendix B Sample API Modules /* Let’s initialize the send PCCC command block to be empty. */ memset((char *) &pcccCmdBlk, 0x0, sizeof(PLC540V_SPCCC_CMD_TYPE)); /* Let’s initialize the send PCCC reply packet to be empty. */ memset((char *) pcccReplyPacket, 0x0, pcccReplyPacketSize); /* Let’s initialize the status variable to success. */ memset((char *) status, 0x0, sizeof(PLC540V_STATUS_TYPE)); /* Copy the PCCC command packet to VME memory.
Appendix B Sample API Modules /* Let’s retrieve the reply packet. */ status->epcStatus=EpcFromVmeAm((BM_MBO|A24SD), BM_W8, vmeReplyPacketAddr, (char far *) pcccReplyPacket, pcccReplyPacketSize); if (status->epcStatus != EPC_SUCCESS) { /* Signal that we have an EPC error. */ status->plc540vStatus = kPLC540V_GET_REPLYBLK_FROM_VME_FAILED; status->statusCategory = kEPC_STATUS; } } } else { /* Signal that we have an EPC error.
Appendix B Sample API Modules /* The PCCC Write Bytes Physical reply packet structure.
Appendix B Sample API Modules * VME_DATA_WIDTH_TYPE width contains the data width that * should be used for the copy operations. It can be D16 * or D08. * * VME_ADDRESS_MODIFIER_TYPE addrMod defines the address space * in which the VME data is accessed. It can be A16 or A24. * * ULONG plcAddress contains the physical address to write to * in the processor. * * PLC540V_PCCC_WBP_DATA_TYPE data contains the data to write * to the processor. * * UBYTE dataLength contains the number of bytes to write.
Appendix B Sample API Modules /* Let’s establish the command packet contents... Note that since we set this block with zeros originally, we don’t need to explicitly set them here. */ cmdPacket.cmd = kPLC540V_PCCC_WBP_CMD; cmdPacket.fnc = kPLC540V_PCCC_WBP_FNC; cmdPacket.addr = plcAddress; memmove((char *) cmdPacket.
Appendix B Sample API Modules /* The PCCC Apply Port Configuration reply packet structure.
Appendix B Sample API Modules * UWORD baseAddress contains the base address of the * PLC-5/40V. * * VME_DATA_WIDTH_TYPE width contains the data width that * should be used for the copy operations. It can be D16 * or D08. * * VME_ADDRESS_MODIFIER_TYPE addrMod defines the address space * in which the VME data is accessed. It can be A16 or A24. * * PLC540V_PCCC_APC_RPY_TYPE reply contains PCCC’s Apply Port * Configuration command specific reply packet.
Appendix B Sample API Modules plc540v_send_pccc_command( vmeCmdBlkAddr, &cmdPacket, kPLC540V_PCCC_APC_CMD_SIZE, reply, kPLC540V_PCCC_APC_RPY_SIZE, baseAddress, kVME_NO_INT_LEVEL, 0, width, addrMod, status); } P40VULC.H #ifndef P40VULC_H #define P40VULC_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC UPLOAD COMPLETE COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VULC.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vulc.
Appendix B Sample API Modules * void plc540v_pccc_upload_complete( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc. 1993 * ****************************************************************************/ void plc540v_pccc_upload_complete( ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, PLC540V_PCCC_ULC_RPY_TYPE *reply, PLC540V_STATUS_TYPE *status) { /* The Upload Complete command packet.
Appendix B Sample API Modules P40VDLA.H #ifndef P40VDLA_H #define P40VDLA_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC DOWNLOAD ALL COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VDLA.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vdla.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_DLA_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_download_all( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VDLC.H #ifndef P40VDLC_H #define P40VDLC_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC DOWNLOAD COMPLETE COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VDLC.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vdlc.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_DLC_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_download_complete( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VECHO.H #ifndef P40VECHO_H #define P40VECHO_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC ECHO COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VECHO.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vecho.
Appendix B Sample API Modules * PLC540V_STATUS_TYPE status; * void plc540v_pccc_echo( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * data, * dataLength, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VGER.H #ifndef P40VGER_H #define P40VGER_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC GET EDIT RESOURCE COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VGER.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vger.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_GER_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_get_edit_resource( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VIHAS.H #ifndef P40VIHAS_H #define P40VIHAS_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC ID HOST AND STATUS COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules UBYTE expansionType; #define kPLC540V_PROCESSOR ULONG memorySize; /* Byte 3, Processor Expansion Type */ 0x37 /* Byte 4, Processor Memory Size(WRDS)*/ UBYTE revision:5; #define kPLC540V_REVISION_A #define kPLC540V_REVISION_B /* Byte 8, Processor Revision & Series*/ 0x0 0x1 UBYTE series:3; #define kPLC540V_SERIES_A #define kPLC540V_SERIES_B 0x0 0x1 UBYTE stationNumber:6; UBYTE reserved1:2; /* Byte 9, Processor station number */ UBYTE adapterAddress; #define kPLC540V_IS_
Appendix B Sample API Modules UBYTE reserved5:2; UBYTE forcesSFC2Enabled:1; #define kPLC540V_SFC2_FORCES_DISABLED #define kPLC540V_SFC2_FORCES_ENABLED UBYTE memoryProtected; #define kPLC540V_MEMORY_NOT_PROTECTED UBYTE ramInvalid; #define kPLC540V_RAM_IS_VALID UBYTE debugMode; #define kPLC540V_DEBUG_MODE_OFF 0x0 0x1 /* Byte 17, Memory Protected; If this is zero, then it is not protected. */ 0x0 /* Byte 18, Bad RAM; If this is zero then RAM is valid.
Appendix B Sample API Modules void plc540v_pccc_id_host_and_status( ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, PLC540V_PCCC_IHAS_RPY_TYPE *reply, PLC540V_STATUS_TYPE *status); #endif P40VIHAS.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vihas.
Appendix B Sample API Modules * * RETURNS: Nothing. * * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_IHAS_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_IHAS( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VRBP.H #ifndef P40VRBP_H #define P40VRBP_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC READ BYTES PHYSICAL COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VRBP.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vrbp.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * ULONG plcAddress; * UBYTE dataLength; * PLC540V_PCCC_RBP_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_read_bytes_physical( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * plcAddress, * dataLength, * &reply, * &status); * * Copyright Allen–Bradley Company, Inc.
Appendix B Sample API Modules P40VRER.H #ifndef P40VRER_H #define P40VRER_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC RETURN EDIT RESOURCE COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VRER.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vrer.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_RER_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_return_edit_resource( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VRMW.H #ifndef P40VRMW_H #define P40VRMW_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC READ-MODIFY-WRITE COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules void plc540v_add_addrmasks(UBYTE arrayIndex, UWORD fileNumber, UWORD elementNumber, UWORD andMask, UWORD orMask, PLC540V_RMW_ADDRMASKS_TYPE addrMasks, PLC540V_STATUS_TYPE *status); void plc540v_pccc_rmw( ULONG vmeCmdBlkAddr, UWORD baseAddress, VME_DATA_WIDTH_TYPE width, VME_ADDRESS_MODIFIER_TYPE addrMod, PLC540V_RMW_ADDRMASKS_TYPE addrMasks, PLC540V_PCCC_RMW_RPY_TYPE *reply, PLC540V_STATUS_TYPE *status); #endif P40VRMW.
Appendix B Sample API Modules /***************************************************************************** * * PURPOSE: This function adds an system address and its corresponding * AND and OR masks to a data structure which will then be used * by the plc540v_pccc_rmw() function. It it imperative that * this data structure be initialized prior to using this * function by calling plc540v_init_addrmasks(). * * UWORD arrayOffset contains the index into the array.
Appendix B Sample API Modules * { * plc540v_add_addrmasks(addrCount, * fileNumber, * elementNumber, * andMask, * orMask, * addrMasks, * &status); * } * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules * PLC540V_RMW_ADDRMASKS_TYPE addrMasks contains system * addresses and their corresponding AND and OR masks. * This structure MUST be initialized by calling * plc540v_init_addrmasks() and each system address must * be added to this data structure by calling the * plc540v_add_addrmasks() function before using this function. * * PLC540V_PCCC_RMW_RPY_TYPE reply contains PCCC’s RMW command * specific reply packet.
Appendix B Sample API Modules /* Let’s initialize these packet to nothing. */ memset((char *) &cmdPacket, 0x0, kPLC540V_PCCC_RMW_CMD_SIZE); memset((char *) reply, 0x0, kPLC540V_PCCC_RMW_RPY_SIZE); memset((char *) status, 0x0, sizeof(PLC540V_STATUS_TYPE)); /* Let’s establish the command packet contents... Note that since we set this block with zeros originally, we don’t need to explicitly set them here. */ cmdPacket.cmd = kPLC540V_PCCC_RMW_CMD; cmdPacket.
Appendix B Sample API Modules /* The PCCC Restore Port Configuration reply packet structure.
Appendix B Sample API Modules * PLC540V_PCCC_RPC_RPY_TYPE reply contains PCCC’s Restore Port * Configuration command specific reply packet. * * OUTPUT: PLC540V_STATUS_TYPE *status will contain the final status * of requesting this function. This status could be and EPC * or PLC-5/40V value. * * RETURNS: Nothing.
Appendix B Sample API Modules P40VSCM.H #ifndef P40VSCM_H #define P40VSCM_H 1 #include ”p40vspcc.h” #pragma pack(1) /***************************************************************************/ /************************ INTEL VERSION OF DEFINITIONS *********************/ /***************************************************************************/ // Set CPU control and mode flags.
Appendix B Sample API Modules P40VSCM.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vscm.
Appendix B Sample API Modules * PLC540V_PCCC_SCM_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_set_cpu_mode( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * ctlmode, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
Appendix B Sample API Modules P40VULA.H #ifndef P40VULA_H #define P40VULA_H 1 /////////////////////////////////////////////////////////////////////////////// // Definitions for the PCCC UPLOAD ALL COMMAND AND REPLY PACKETS // /////////////////////////////////////////////////////////////////////////////// #include ”p40vspcc.
Appendix B Sample API Modules P40VULA.C #include #include #include #include #include #include #include ”epc_obm.h” ”epc_err.h” ”busmgr.h” ”p40vula.
Appendix B Sample API Modules * EXAMPLE: * ULONG vmeCmdBlkAddr = 0xE0F100; * UWORD baseAddress = 0XFC00; * VME_DATA_WIDTH_TYPE width = kVME_D16_DATA_WIDTH; * VME_ADDRESS_MODIFIER_TYPE addrMod = kVME_A24_ADDR_SPACE; * PLC540V_PCCC_ULA_RPY_TYPE reply; * PLC540V_STATUS_TYPE status; * void plc540v_pccc_upload_all( * vmeCmdBlkAddr, * baseAddress, * width, * addrMod, * &reply, * &status); * * Copyright Allen-Bradley Company, Inc.
C Appendix Specifications Environmental Specifications Characteristic Temperature Humidity Altitude Value Operating 0-65° C at point of entry of forced air with 200 LFM of air flow across the circuit board. Derated 2° C per 1000 ft (300m) over 6600 ft (2000m).
Appendix C Specifications VMEbus Specifications Characteristic (Revision C.1) Value Master address A16, A24 Master transfer D08(EO), D16 Slave address A16, A24 Slave transfer D08(EO), D16 Interrupter I(1–7), D08(O) Interrupt handler IH(1–7), D08(O) Requester ROR,RWD System controller SYSCLK, IACK daisy chain, bus timer, SGL arbiter ACFAIL Input required for PLC-5/VME processor to maintain ladder and data files integrity.
Appendix C PLC-5/VMEt Processor Specifications PLC-5/V30t (1785-V30B)10. Maximum User Memory Words 32 K Maximum Total I/O Any Mix Complementary Maximum Analog I/O PLC-5/V40t (1785-V40B) PLC-5/V40Lt (1785-V40L) 48 K ➀ 100 K ➀ 896 1920 2944 896 in and 896 out 1920 in and 1920 out 2944 in and 2944 out 896 1920 2944 Program Scan Time 0.5 ms per K word (bit logic) 2 ms per K word (typical) I/O Scan Time 0.5 ms (extended local) 10 ms per rack @ 57.6 kbps 7 ms per rack @ 115.
Appendix D Troubleshooting Appendix Objectives Read this appendix when you troubleshoot the PLC-5/VME processor. For the PLC-5/VME processor to maintain integrity of the ladder program and data files, the VME power supply must assert ACFAIL at least 9 ms in advance of the +5 VDC supply dropping beneath 4.75V.
Appendix D Troubleshooting Message Completion and Status Bits Error Codes Continuous-Copy Error Codes Command-Protocol Error Codes D-2 For unrecognizable messages, ER is set along with an error code.
Appendix D Troubleshooting Response-Word Error Codes PCCC Command Status Codes These are errors reported in the response word of the command block when the command cannot be carried out successfully. The even byte of the response word describes the type of error and the odd byte describes the time or situation of occurrence.
Appendix D Troubleshooting The codes returned in the EXT STS (extended status) field when the remote error (STS) is F0H are listed below: Code (hex) Explanation 0 Not used 1 A field has an illegal value 2 Less levels specified in address than minimum for any address 3 More levels specified in address than system supports 4 Symbol not found 5 Symbol is of improper format 6 Address does not point to something usable 7 File is wrong size 8 Cannot complete request, situation has changed sinc
Appendix D Troubleshooting Avoiding Multiple Watchdog Faults1. If you encounter a hardware error or watchdog major fault, it may be because multiple watchdog faults occured while the processor was busy servicing a ladder-related major fault. The hardware error occurs when the fault queue, which stores a maximum of six faults, becomes full and cannot store the next fault.
Appendix D Troubleshooting Recovering from Possible Memory Corruption ATTENTION: Processor memory could become altered without indication if you lose power while performing any of the following online editing operations: creating a rung assembling online edits creating and/or deleting data table space If you lose power while editing your program, use your programming software package to clear potentially altered memory and restore the last-saved version of your program.12.
E Appendix Cable Connections Cable Connections for Communication Boards Table E.A lists the cables that you use if you have an Allen-Bradley communication board in your programming terminal. Table E.
Appendix E Cable Connections Front Panel E-2 The channel 0 connector on the front panel is an RS-232C serial port. It is a 25-pin D-shell connector whose pins are defined in the following table.
Appendix E Cable Connections 9-Pin Serial Port 1784-T50 1784-T53 6160-T60 6160-T70 IBM PC/AT cable #1 Terminal 1784-CP5 1770-KF2 PLC-5/10, -5/12, 5/15, -5/25 & 1784-CP7 1784-CAK Terminal 1785-KE Series B 1770-CD PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, -5/60L, -5/80, and -5/VME PLC-5 Note: 1785-KE series A uses 1784-CP5 with PLC-5/10, -5/12, -5/15, and -5/25 processors and 1785-CP5 with 1785-CP7 adapter with PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, and 5/60L processors.
Appendix E Cable Connections 25-Pin Serial Port 1784-T47 IBM XT IBM PS/2 Model 30 IBM PS/2 Model 60 cable #2 Terminal 1784-CP5 1770-KF2 PLC-5/10, -5/12, -5/15, -5/25 + 1784-CP7 Terminal 1784-CXK 1785-KE Series B 1770-CD PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, -5/60L, -5/80, and -5/VME PLC-5 Note: 1785-KE Series A uses 1784-CP5 with PLC-5/10, -5/12, -5/15, and -5/25 processors and 1785-CP5 with 1785-CP7 adapter with PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, -5/60L, and 5/80 processors
Appendix E Cable Connections 9-Pin Serial Port 6120 6122 Terminal cable #3 1784-CP5 1770-KF2 PLC-5/10, -5/12, -5/15, -5/25 PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, -5/60L, -5/80, and -5/VME & 1784-CP7 Terminal 1784-CYK 1770-CD 1785-KE Series B PLC-5 Note: 1785-KE series A uses 1784-CP5 with PLC-5/10, -5/12, -5/15, and -5/25 processors and 1785-CP5 with 1785-CP7 adapter with PLC-5/11, -5/20, -5/30, -5/40, -5/60, -5/40L, 5/60L, -5/80, and -5/VME processors.
Appendix E Cable Connections Cable Pin Assignments The following diagrams show the pin assignments for the cables that you need for serial-port communications.
Appendix E Cable Connections Cable Specifications The specifications for each Allen-Bradley cable used for communications are shown on the following pages. See Table E.B. Table E.
Appendix E Cable Connections Figure E.1 Interconnect Cable—1784-CAK 6160-T53, -T60, -T70, 6121, IBM PC/AT to 1785-KE 15 – pin D–shell C onnector P in M ale 9 1 15 8 1785–K E 1 9 – pin D–shell C onnector P in F em ale 2.9 m (9.50 ft.
Appendix E Cable Connections Figure E.2 Interconnect Cable—1784-CXK 1784-T45, IBM XT to 1785-KE 15 – pin D – shell C o nnector P in M ale 8 15 1 9 25 – pin D – shell C onnector P in F em ale 289.6 cm (114 in.
Appendix E Cable Connections Figure E.3 Interconnect Cable—1784-CYK 6120, 6122 to 1785-KE 15 – pin D – shell C onnector P in M ale 8 15 1 9 9 – pin D – shell C onnector P in F em ale 289.6 cm (114 in.
Appendix E Cable Connections Figure E.4 Interconnect Cable—1784-CP5 Processor to Terminal (using a 1784-KTK1) 15 – pin D –shell C onnector P in F em ale 9 – pin D –shell C onnector P in M ale 6 1 9 5 3.2 m (10.50 ft.
Appendix E Cable Connections Figure E.5 Interconnect Cable—1784-CP Processor to Terminal (using a 1784-KT or 1784-KL) 3.2 m (10.50 ft.) Industrial Terminal End 10.2 cm (4 in.) 22 43 62 10.2 cm (4 in.
Appendix E Cable Connections Figure E.
Appendix E Cable Connections Figure E.
Index Symbols **Empty**, B 2-1 Basic configuration, Numbers block-transfer data defined, iv timing, 7-12 1770–CD, 1-5 2-8 1770–KF2, E-1 1771-AF, 2-9 1771-AS, 2-9 1771-CXT, 2-11 1771-DCM, 2-9 1771-KT2, 1771-SN, C Cable, specifications, Cables, E-1 connections for communication boards, E-1 connections for serial communications, E-1 pin assignments, E-6 remote I/O, 2-6 serial port, 2-14 specifications, E-7 E-1 2-9 1771-ASB, 2-9 1772-SD, -SD2, 2-9 1775-S4A, -S4B, 1775-SR, 2-9 Chann
I–2 Index device-type register, 3-5 eight configuration register structure, 3-4 ID register, 3-5 offset register, 3-6 status/control register, 3-5 Connecting to I/O, G Get edit resource, Grounding, 2-5 H 2-6 Connectors, remote I/O, 6-29 2-8 Continuous copy error codes, 4-11, Continuous-copy commands, 5-2 Copy operation, notes, 5-3 Copy synchronization, 5-4 CPU based driver examples, 5-4 Handle-interrupts command, 5-5 Header bit/byte descriptions, 6-4 I I/O housekeeping, A-1 I/O, con
Index Modem, E-1 See also Programming Terminal P P40CCC0.C, sample, B-18 P40CCC0.H, sample, B-17 P40VAPC.C, sample, B-47 P40VAPC.H, sample, B-46 P40VDLA.C, sample, B-53 P40VDLA.H, sample, B-52 P40VDLC.C, sample, B-56 P40VDLC.H, sample, B-55 P40VECHO.C, sample, B-59 P40VECHO.H, sample, B-58 P40VGER.C, sample, B-62 P40VGER.H, sample, B-61 P40VHINT.C, sample, B-33 P40VHINT.H, sample, B-32 P40VIHAS.C, sample, B-67 P40VIHAS.
I–4 Index Programming terminal cable connections, E-7 direct connection, 2-12 modem, E-1 serial connection, 2-14 Programs, example, A-1 R Read bytes physical, Read-modify-write, 6-26 6-8 REM. See Keyswitch operation Remote I/O cable lengths, 2-6 connecting link to PLC-V5 processor, 2-6 making connections, 2-7 terminating the link, 2-9 remote I/O chassis, defined, iv remote I/O link, defined, iv Response word error codes, Restore port configuration, Return edit resource, 5-8, 6-32 6-30 RUN.
Index T Upload all request, Terminating link extended-local I/O, remote I/O, 2-9 Upload complete, 2-11 Termination resistors, 2-9 extended-local I/O, 2-11 using 150-Ohm resistors, 2-9 using 82-Ohm resistors, 2-9 timing block-transfer data during logic scan, 7-14 to extended-local I/O, 7-14 to remote I/O, 7-17 discrete-transfer data during I/O scan, 7-12 to extended-local I/O, 7-13 to processor-resident I/O, 7-12 to remote I/O, 7-12 I/O scan, 7-11 program scan, 7-8 I/O scan housekeeping, 7-8 immediate I
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