Specifications

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I/O CONNECTOR
Table 1. I/O Connector Signals
Pin Signal Name Description
1 GND Signal Ground
2 GND Signal Ground
3D0CPU Data Bit 0
4D1CPU Data Bit 1
5D2CPU Data Bit 2
6D3CPU Data Bit 3
7D4CPU Data Bit 4
8D5CPU Data Bit 5
9D6CPU Data Bit 6
10 D7 CPU Data Bit 7
11 R/W
CPU Read/Write Signal
12 A0 CPU Address Bit 0
13 A1 CPU Address Bit 1
14 A2 CPU Address Bit 2
15 A3 CPU Address Bit 3
16 A4 CPU Address Bit 4
17 A5 CPU Address Bit 5
18 A6 CPU Address Bit 6
19 A7 CPU Address Bit 7
20 A8 CPU Address Bit 8
21 A9 CPU Address Bit 9
22 A10 CPU Address Bit 10
23 A11 CPU Address Bit 11
24 A12 CPU Address Bit 12
25 A13 CPU Address Bit 13
26 A14 CPU Address Bit 14
27 A15 CPU Address Bit 15
28 E Main CPU Clock (0.89 MHz)
29 SEL Input to Disable Device Selection
30 RESET Main Reset and Power-up Clear Signal to
the System
31 NMI
Non-Maskable Interrupt to the CPU
32 +5v +5 volts (250 mA)
33 GND Signal Ground
34 GND Signal Ground
external memory modules or ROM software
modules. Table 1 provides a complete list of the
signals and a brief description of each.
In addition to serial interfaces, the MC-10 also
provides a full complement of CPU bus signals
that are accessible at the 34-pin cartridge con-
nector. This allows expansion of the MC-10 with