Specifications

Installation and Operation Manual Chapter 1 Introduction
RICi-622GE Ver. 1.0 Overview 1-3
Features
Ethernet Link Redundancy
The Gigabit Ethernet ports can act as bridge ports or be aggregated to provide
Gigabit Ethernet link redundancy, to allow reliable and uninterrupted service. The
RICi-622GE unit supports Gigabit Ethernet link redundancy based on the link
aggregation protocol IEEE 802.3ad.
SDH/SONET APS Support
RICi-622GE supports 1+1 link protection (unidirectional MSP/APS) on the
SDH/SONET links, according to the ITU-T G.841 requirements. K1/K2 byte
functionality is provided according to Telecordia GR-253 and ITU-T G.783.
Additional protection is provided by the VCAT and LCAS protocols.
SDH/SONET Timing
You can define a master clock source, and a fallback source to be used if the
master clock source fails. The SDH/SONET clock source can be one of the
following:
Internal – Reference source generated by the RICi-622GE internal oscillator
Rx clock – Reference source locked to the receive clock recovered from the
line signal of the STM-1/OC-3c interface.
EVC Mapping
The ingress user traffic is mapped to the Ethernet flows (EVCs) using the
following per-port criteria:
Port-based (All-to-one bundling)
User port + CE-VID
User port + CE-VLAN priority.
RICi-622GE supports up to 16 Ethernet flows.
Policing and Bandwidth Profiles
RICi-622GE provides per-flow dual token bucket policing that enables CIR/CBS and
EIR/EBS.
Traffic Prioritization and Quality of Service
Once traffic is classified to EVC or EVC.CoS, it is mapped to one four priority
queues. The unit uses WRED (tail-drop) policy to ensure that queues are not
congested and high-priority traffic is not dropped.