User`s manual

OP7100 Hardware
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Figure 3-3. OP7100 Power-Failure Detection Circuit
Since R34 >> RN2, the difference between V
H
and V
L
, the hysteresis
voltage, would be 5 V × (R30/R34). For a nominal hysteresis voltage of
1.25 V, R
30
= 0.25 × R34.
Memory Protection
When /RESET is active, the ADM691 supervisor disables the RAM chip-
select line, preventing accidental writes.
Battery Backup
The backup battery protects data in the RAM and the real-time clock (RTC).
VRAM, the voltage supplied to the RAM and RTC, can also protect other
devices attached to the system against power failures. The ADM691 super-
visor switches VRAM to VBAT or VCC, whichever is greater. (To prevent
“hunting,” the switchover actually occurs when Vcc is 50 mV higher than
VBAT.)
The circuit draws no current from the battery once regular power is applied.
System Reset
The ADM691 chip drives the /RESET line. The /RESET line is not pulled
up internally.
DCIN
U28 Reg.
VCC
R30
29.4 kW
R29
4.99 kW
PFI to supervisor
VIN VOUT
C44
47 µF
U12 Supervisor
VBAT
WDI
PFI
VOUT
WDO
PFO
RST
INT1
R34
220 kW
RST
VCC
RN2
10 kW
⎥
⎦
⎤
⎢
⎣
⎡
⎟
⎠
⎞
⎜
⎝
⎛
+
⎟
⎠
⎞
⎜
⎝
⎛
+=
⎥
⎥
⎦
⎤
⎢
⎢
⎣
⎡
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
−
⎟
⎠
⎞
⎜
⎝
⎛
+=
R34
R30
R29
R30
1V3.1V
RN2)V(R341.3
V)1.3-V5(R30
R29
R30
1V3.1V
H
L