Specifications

DATA SHEET QF4A512
Rev D4, Dec 07 52 www.quickfiltertech.com
Description: Soft reset the FIR block, filter 0.
fir_0_1_srst
*0 = No action
1 = Reset
Description: Soft reset the FIR block, filter 1.
52h CHP_OFFSET_1 (Chopper clock phase offset) – Factory use only
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 52h D7 D6 D5 D4 D3 D2 D1 D0
53h CHP_OFFSET_1 (Chopper clock phase offset) – Factory use only
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 53h X X X X D11 D10 D9 D8
Default value = 95
Description: Chopper clock phase offset value.
54h AREC_OFFSET_1 (Digital offset) – Factory use only
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 37h D7 D6 D5 D4 D3 D2 D1 D0
55h AREC_OFFSET_1 (Digital offset) – Factory use only
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 55h D15 D14 D13 D12 D11 D10 D9 D8
Default value = C000
Description: Digital offset for the channel.
56h CAL_1_OFF (Calibration offset)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 56h D7 D6 D5 D4 D3 D2 D1 D0
57h CAL_1_OFF (Calibration offset)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 57h D15 D14 D13 D12 D11 D10 D9 D8
Default value = 0
Description: Offset calibration value is written here.
58h CAL_1_GAIN (Calibration gain)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 58h D7 D6 D5 D4 D3 D2 D1 D0
59h CAL_1_GAIN (Calibration gain)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 59h D15 D14 D13 D12 D11 D10 D9 D8