Specifications

DATA SHEET QF4A512
Rev D4, Dec 07 34 www.quickfiltertech.com
Several registers are designated as “Reserved”. The user may write to these registers without any effect on chip operation, i.e. it is
possible to write to the entire register map as a single contiguous block. However, when they are read these registers will return all
ones or zeroes, not necessarily reflecting the value written to them during the write operation.
The corresponding EEPROM locations can also be written, and these values can also be read back. Since these locations may be used
for future functionality they should not be used for user data (the user area is available for this purpose).
Other registers are denoted for Factory Use Only. These registers should be written with the default values shown to ensure correct
device operation.
Table 17. Control Register listing (High-Level, EEPROM Startup, Run & Status)
Hex* Register Name Description
0000h GLBL_SW Software Register, Test Reads and Writes
0001h GLBL_ID Chip ID Including Revision Number.
0002h FULL_SRST Activates all soft resets
0003h GLBL_CH_CTRL Reset, Enable or Power Down each channel
0004h RUN_MODE Set chip in Run or Configure Mode
0005h EE_TRANS Control data transfers to/from EEPROM
0006h EE_COPY Control full transfers to/from EEPROM
0007h STARTUP_1 Set startup configuration, rate for EEPROM clock
0008h STARTUP_2 Initialization delay counter
0009h ENABLE_0 Enable ADC and system clock per channel
000Ah ENABLE_1 Enable AAF per channel, ADC operation mode
000Bh ENABLE_2 Designate active channels
000Ch PLL_SIF_STAT PLL lock, SIF address out of range
000Dh EE_VAL EEPROM status register value
000Eh EE_STATUS EEPROM transfer status flags
000Fh ADC_STATUS_0 ADC out of range, per channel
0010h ADC_STATUS_1 ADC out of range, high or low, per channel
Several registers are designated as “Reserved”. The user may write to these registers without any effect on chip operation, i.e. it is
possible to write to the entire register map as a single contiguous block. However, when they are read these registers will not
necessarily reflect the value written to them during the write operation.
12.2 High-level Registers
Note: * denotes default values
00h GLBL_SW (User Register)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 00h D7 D6 D5 D4 D3 D2 D1 D0
Description: Global Software is provided as a blank user byte for the programmer to read and write to as a test. This byte defaults to 0
at power up and is not loaded from EEPROM.
01h GLBL_ID (Chip ID) - READ ONLY
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address 01h ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
[ID7:ID0] = Identification number of the QF4A512, default = A0h (was B1h on pre-production devices).
Description: This read-only byte contains a number describing the identification of the QF4A512 device. This data is hard-wired and is
not transferred from EEPROM. It can be read at any time.
Note: Revision information can be found in the DIE_REV register (EAh)