Hardware Design V1.0

NB-IoT Module Series
BC95 Hardware Design
BC95_Hardware_Design Confidential / Released 6 / 45
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ................................................................................................................ 11
FIGURE 2: PIN ASSIGNMENT ......................................................................................................................... 13
FIGURE 3: REFERENCE CIRCUIT FOR THE VBAT INPUT ........................................................................... 18
FIGURE 4: TURN-ON TIMING .......................................................................................................................... 19
FIGURE 5: TURN-OFF TIMING ........................................................................................................................ 19
FIGURE 6: REFERENCE CIRCUIT OF RESET BY USING DRIVING CIRCUIT ............................................. 20
FIGURE 7: REFERENCE CIRCUIT OF RESET BY USING BUTTON ............................................................. 20
FIGURE 8: REFERENCE DESIGN FOR SWD INTERFACE............................................................................ 21
FIGURE 9: REFERENCE DESIGN FOR MAIN PORT ..................................................................................... 23
FIGURE 10: REFERENCE DESIGN FOR DEBUG PORT ............................................................................... 23
FIGURE 11: LEVEL MATCH DESIGN FOR 3.3V SYSTEM .............................................................................. 24
FIGURE 12: SKETCH MAP FOR RS-232 INTERFACE MATCH ...................................................................... 24
FIGURE 13: REFERENCE CIRCUIT FOR USIM INTERFACE WITH 6-PIN USIM CARD CONNECTOR ...... 26
FIGURE 14: BEHAVIORS OF RI WHEN THE URC OR SMS IS RECEIVED .................................................. 27
FIGURE 15: REFERENCE DESIGN FOR NETLIGHT ..................................................................................... 28
FIGURE 16: REFERENCE DESIGN FOR RF .................................................................................................. 29
FIGURE 17: COPLANAR WAVEGUIDE LINE STRUCTURE (SOFTWARE CALCULATION) ......................... 30
FIGURE 18: LAYOUT FOR TWO-LAYER PCB ................................................................................................. 30
FIGURE 19: LAYOUT FOR FOUR-LAYER PCB (THIRD LAYER AS REFERENCE GROUND) ...................... 31
FIGURE 20: LAYOUT FOR FOUR-LAYER PCB (BOTTOM LAYER AS REFERENCE GROUND) ................. 31
FIGURE 21: RECOMMENDED RF CABLE SOLDERING ................................................................................ 33
FIGURE 22: TOP AND SIDE DIMENSIONS OF BC95 MODULE (UNIT: MM) ................................................. 36
FIGURE 23: BOTTOM DIMENSIONS OF BC95 MODULE (UNIT: MM) ........................................................... 37
FIGURE 24: RECOMMENDED FOOTPRINT (UNIT: MM) ................................................................................ 38
FIGURE 25: TOP VIEW OF THE MODULE ...................................................................................................... 39
FIGURE 26: BOTTOM VIEW OF THE MODULE .............................................................................................. 39
FIGURE 27: RAMP-SOAK-SPIKE REFLOW PROFILE .................................................................................... 41
FIGURE 28: TAPE DIMENSIONS ..................................................................................................................... 42
FIGURE 29: REEL DIMENSIONS ..................................................................................................................... 43
Quectel
Confidential