Service Guide

Table Of Contents
LTE-A Module Series
EM060K-GL&EM120K-GL_Hardware_Design 41 / 78
relationship with 8 kHz PCM_SYNC and 256 kHz PCM_CLK.
PCM_CLK
PCM_SYNC
PCM_DOUT
MSB
LSB
MSB
125 μs
1 2 256255
PCM_DIN
MSB
LSBMSB
Figure 19: Primary Mode Timing
PCM_CLK
PCM_SYNC
PCM_DOUT
MSB
LSB
PCM_DIN
125 μs
MSB
1 2 3231
LSB
Figure 20: Auxiliary Mode Timing
The following table shows the pin definition of PCM interface which can be applied to audio codec design.
Table 15: Pin Definition of PCM Interface
Pin No. Pin Name I/O Description Comments
20 PCM_CLK DIO, PD PCM clock 1.8 V
22 PCM_DIN DI, PD PCM data input 1.8 V