Service Guide
Table Of Contents
- Safety Information
- About the Document
- Contents
- Table Index
- Figure Index
- 1 Introduction
- 2 Product Overview
- 3 Operating Characteristics
- 4 Application Interfaces
- 5 Antenna Interfaces
- 6 Reliability, Radio, and Electrical Characteristics
- 7 Mechanical Information
- 8 Storage, Manufacturing, and Packaging
- 9 Appendix References
LTE Standard Module Series
EG915U_Series_Hardware_Design 55 / 90
4.7K
47K
VBAT
2.2K
Module
STATUS
Figure 27: Reference Circuit of STATUS
4.10.3. MAIN_RI
You can configure MAIN_RI behaviors with AT+QCFG="risignaltype","physical". No matter on which
port a URC is presented, the URC will trigger the behaviors of MAIN_RI.
MAIN_RI behavior can be configured flexibly. The default behaviors of the MAIN_RI are shown as below.
Table 28: Behaviors of MAIN_RI
The MAIN_RI behaviors can be changed via AT+QCFG="urc/ri/ring". See document [2] for details.
State
Response
Idle
MAIN_RI keeps at high level.
URC
MAIN_RI outputs 120 ms low pulse when a new URC returns.
1. The URC can be output via UART port, USB AT port, and USB modem port, which can be set by
AT+QURCCFG. The default setting is USB AT port.
2. When using AP_READY and MAIN_RI (pins 19 and 39), please note that they will have a period of
variable level state (not controllable by software) after the module is powered on: first high level (3
V) for 2 s and then low level (0 V) for 1.2 s, before they can be configured as 1.8 V input or output.
Please evaluate whether the unstable output state on power-up meets your application design
requirements based on the specific usage scenario and circuit design.
NOTE