Service Guide
Table Of Contents
- Safety Information
- About the Document
- Contents
- Table Index
- Figure Index
- 1 Introduction
- 2 Product Overview
- 3 Operating Characteristics
- 4 Application Interfaces
- 5 Antenna Interfaces
- 6 Reliability, Radio, and Electrical Characteristics
- 7 Mechanical Information
- 8 Storage, Manufacturing, and Packaging
- 9 Appendix References
LTE Standard Module Series
EG915U_Series_Hardware_Design 28 / 90
following chapters describe power saving procedures of the module.
3.2.1 UART Application Scenario
If the host communicates with module via UART interface, the following preconditions should be met to
make the module enter sleep mode.
⚫ Execute AT+QSCLK=1 to enable sleep mode.
⚫ Drive MAIN_DTR to high level.
The following figure shows the connection between the module and the host.
MAIN_RXD
MAIN_TXD
MAIN_RI
MAIN_DTR
AP_READY
TXD
RXD
EINT
GPIO
GPIO
Module
Host
GND
GND
Figure 3: Sleep Mode Application via UART
⚫ Driving MAIN_DTR low will wake up the module.
⚫ When the module has a URC to report, the URC will trigger the behavior of MAIN_RI pin. See
Chapter 4.10.3 for details about MAIN_RI behaviors.
⚫
When using AP_READY, MAIN_DTR, and MAIN_RI (pins 19, 30, and 39), please note that these pins
will have a period of variable level state (not controllable by software) after the module is powered on:
first high level (3 V) for 2 s and then low level (0 V) for 1.2 s, before they can be configured as 1.8 V
input or output. Please evaluate whether the unstable output state on power-up meets your application
design requirements based on the specific usage scenario and circuit design.
NOTE