Service Guide
Wi-Fi&Bluetooth Module Series
FC908A_Hardware_Design 24 / 49
The following figure shows the SDIO interface connection between FC908A and host.
SDIO_CLK
SDIO_CMD
SDIO_DATA0
SDIO_DATA1
SDIO_DATA2
SDIO_DATA3
Host
FC908A SDIO_DATA0
SDIO_DATA1
SDIO_DATA2
SDIO_DATA3
SDIO_CLK
SDIO_CMD
10K
VIO
NM_10K
NM_10K
NM_10K
NM_10K
NM NM
NM
NM
NM
NM
NM_10K
Figure 6: SDIO Interface Connection
To ensure that the interface design complies with the SDIO 2.0 specification, the following principles are
recommended to be adopted:
⚫ Route the SDIO traces in inner-layer of the PCB and the impedance is controlled at 50 Ω ±10 %.
⚫ SDIO signals need to be keep away from sensitive signals, such as radio frequency, analog signals,
clocks, and DC-DC noise signals.
⚫ SDIO_DATA 2 requires an external 10 kΩ resistor to be pulled up to VDDIO, and maintains a high
level during the process of powering on the FC908A.
⚫ SDIO signal traces need to be treated with equal length (the distance between the traces is less than
1 mm).
⚫ The distance between SDIO signals and other signals must be greater than 2 times the trace width,
and the busload capacitance must be less than 15 pF.
The maximum length of the internal wiring of the SDIO module is 5.71 mm.