Product Info

SC200L Hardware Design
SC200L_Hardware_Design 38 / 103
recommended to route the trace on the inner layer of PCB and keep the same trace length for CLK, CMD,
DATA0, DATA1, DATA2 and DATA3. CLK needs separate ground shielding.
Layout guidelines:
 Control impedance to 50Ω ±10% and ground shielding is required.
 The total trace length difference between CLK and other signal line traces like CMD and DATA
should not exceed 1 mm.
Table 13: SD Card Trace Length Inside the Module
3.12. GPIO Interfaces
SC200L has abundant GPIO interfaces with a power domain of 1.85V. The pin definition is listed below.
Table 14: Pin Definition of GPIO Interfaces
Pin No. Signal Length (mm)
39 SD_CLK 43.50
40 SD_CMD 42.82
41 SD_DATA0 45.92
42 SD_DATA1 46.24
43 SD_DATA2 43.97
44 SD_DATA3 45.62
Pin Name Pin No GPIO Default state Comment
GPIO_87 33 GPIO_87 IN/PD
1)
GPIO_86 90 GPIO_86 IN/PU
GPIO_85 97 GPIO_85 OUT/Hiz
GPIO_88 98 GPIO_88 IN/PU
GPIO_139 99 GPIO_139 IN/PU
GPIO_136 100 GPIO_136 IN/PU