Product Info

5G Module Series
RM502Q-GL Hardware Design
RM502Q-GL_Hardware_Design 6 / 77
Figure Index
Figure 1: Functional Diagram ..................................................................................................................... 13
Figure 2: Pin Assignment ........................................................................................................................... 16
Figure 3: Power Supply Limits during Radio Transmission ....................................................................... 22
Figure 4: Reference Circuit of VCC Pins ................................................................................................... 22
Figure 5: Reference Design of Power Supply ............................................................................................ 23
Figure 6: Turn on the Module with a Host GPIO ........................................................................................ 24
Figure 7: Turn on the Module Automatically .............................................................................................. 24
Figure 8: Turn on the Module with Compatible Design ............................................................................. 25
Figure 9: Turn-on Timing of the Module ..................................................................................................... 25
Figure 10: Turn-off Timing through FULL_CARD_POWER_OFF# ........................................................... 26
Figure 11: Turn-off Timing through AT Command and FULL_CARD_POWER_OFF# ............................ 27
Figure 12: Turn-off Timing through AT Command and Power Supply ...................................................... 27
Figure 13: Reference Circuit of RESET_N with NPN Driving Circuit ........................................................ 28
Figure 14: Reference Circuit of RESET_N with NMOS Driving Circuit ..................................................... 29
Figure 15: Reference Circuit of RESET_N with Button ............................................................................. 29
Figure 16: Resetting Timing of the Module ................................................................................................ 29
Figure 17: Reference Circuit of Normally Closed (U)SIM Card Connector ............................................... 31
Figure 18: Reference Circuit of Normally Open (U)SIM Card Connector ................................................. 31
Figure 19: Reference Circuit of a 6-Pin (U)SIM Card Connector .............................................................. 32
Figure 20: Reference Circuit of USB 3.1 & 2.0 Interface ........................................................................... 33
Figure 21: PCIe Interface Reference Circuit (EP Mode) ........................................................................... 36
Figure 22: PCIe Power-on Timing Requirements of M.2 Specification ..................................................... 36
Figure 23: PCIe Power-on Timing Requirements of the Module ............................................................... 37
Figure 24: Primary Mode Timing ................................................................................................................ 39
Figure 25: Auxiliary Mode Timing .............................................................................................................. 39
Figure 26: W_DISABLE1# and W_DISABLE2# Reference Circuit ........................................................... 42
Figure 27: WWAN_LED# Reference Circuit .............................................................................................. 43
Figure 28: WAKE_ON_WAN# Signal Reference Circuit ........................................................................... 44
Figure 29: Recommended Circuit of Configuration Pins ........................................................................... 46
Figure 30: Reference Circuit of RF Antenna .............................................................................................. 52
Figure 31: Microstrip Design on a 2-layer PCB ......................................................................................... 54
Figure 32: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 54
Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 54
Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 55
Figure 35: Antenna Connectors on the Module ......................................................................................... 56
Figure 36: RM502Q-GL RF Connector Dimensions (Unit: mm) ................................................................ 58
Figure 37: Specifications of Mating Plugs Using Ø0.81 mm Coaxial Cables ............................................ 58
Figure 38: Connection between RF Connector and Mating Plug Using Ø0.81 mm Coaxial Cable .......... 59
Figure 39: Connection between RF Connector and Mating Plug Using Ø1.13 mm Coaxial Cable .......... 59
Figure 40: Thermal Dissipation Area on Bottom Side of Module (Bottom View)....................................... 71
Figure 41: Mechanical Dimensions of RM502Q-GL (Unit: mm) ................................................................ 73