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EM121R-GL

Hardware Design

LTE-A Module Series

Version: 1.0.0

Date: 2021-04-07

Status: Preliminary

Summary of content (88 pages)

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EM121R-GL Hardware Design LTE-A Module Series Version: 1.0.
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LTE-A Module Series EM121R-GL Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
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LTE-A Module Series EM121R-GL Hardware Design Copyright The information contained here is proprietary technical information of Quectel. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright © Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved.
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LTE-A Module Series EM121R-GL Hardware Design Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product.
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LTE-A Module Series EM121R-GL Hardware Design About the Document Revision History Version Date Author Description - 2021-04-07 Jim HAN/ Kingson ZHANG Alex WANG Creation of the document 1.0.
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LTE-A Module Series EM121R-GL Hardware Design Contents Safety Information ....................................................................................................................................... 3 About the Document ................................................................................................................................... 4 Contents .........................................................................................................................................
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LTE-A Module Series EM121R-GL Hardware Design 4.3. 4.4. 4.5. 4.6. 4.7. 4.8. PCIe Interface ........................................................................................................................... 41 4.3.1. Pin definition of PCIe...................................................................................................... 41 4.3.2. Reference Design for PCIe ............................................................................................ 42 4.3.3. PCIe Timing.......
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LTE-A Module Series EM121R-GL Hardware Design 6.4. 6.5. 6.6. 6.7. Electrostatic Discharge ............................................................................................................. 72 Thermal Dissipation .................................................................................................................. 72 Absolute Maximum Ratings ...................................................................................................... 74 Operating and Storage Temperatures ...
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LTE-A Module Series EM121R-GL Hardware Design Table Index Table 1: Special Mark................................................................................................................................. 13 Table 2: Frequency Bands and GNSS Types of EM121R-GL .................................................................. 14 Table 3: Key Features of EM121R-GL.......................................................................................................
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LTE-A Module Series EM121R-GL Hardware Design Table 45: Antenna Requirements of EM121R-GL ..................................................................................... 68 Table 47: Power Supply Requirements ..................................................................................................... 70 Table 48: EM121R-GL Current Consumption (PCIe Only Version, 3.3 V Power Supply) ........................ 70 Table 49: EM121R-GL Current Consumption (USB Only Version, 3.7 V Power Supply) ....
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LTE-A Module Series EM121R-GL Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment ........................................................................................................................... 19 Figure 3: DRX Run Time and Current Consumption in Sleep Mode .........................................................
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LTE-A Module Series EM121R-GL Hardware Design Figure 43: Tray Size (Unit: mm) ................................................................................................................. 77 Figure 44: Tray Packaging Procedure .......................................................................................................
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LTE-A Module Series EM121R-GL Hardware Design 1 Introduction 1.1. Introduction The hardware design defines EM121R-GL and describes the air and hardware interfaces which are connected with customers’ applications. This document helps you quickly understand the interface specifications, electrical and mechanical details, as well as other related information of EM121R-GL. To facilitate its application in different fields, reference design is also provided for reference.
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LTE-A Module Series EM121R-GL Hardware Design 1.3. Special Mark Table 1: Special Mark Mark Definition * When an asterisk (*) is used after a function, feature, interface, pin name, AT command, or argument, it indicates that the function, feature, interface, pin name, AT command, or argument is under development and currently not supported, unless otherwise specified. […] Brackets ([…]) used after a pin enclosing a range of numbers indicate all pin of the same type.
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LTE-A Module Series EM121R-GL Hardware Design 2 Product Concept 2.1. General Description EM121R-GL is a LTE-A/UMTS/HSPA+ wireless communication module with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA networks. They are standard WWAN M.2 Key-B modules. For more details, see PCI Express M.2 Specification Revision 2.0, Version 1.2. EM121R-GL is an industrial-grade module for industrial and commercial applications only.
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LTE-A Module Series EM121R-GL Hardware Design voice and data functions, while Data-only version only supports data function. 3. 4) LTE-FDD B29/B32 and LTE-TDD B46 support Rx only and are only for secondary component carrier. 4. For details about CA combinations, see document [1]. EM121R-GL can be applied in the following fields: ⚫ Tablet PC and Laptop ⚫ Remote Monitor System ⚫ Wireless POS System ⚫ Smart Metering System ⚫ Wireless Router and Switch ⚫ Other Wireless Terminal Devices 2.2.
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LTE-A Module Series EM121R-GL Hardware Design ⚫ Support master and slave modes, but must be the master in long frame synchronization Rx-diversity ⚫ LTE/WCDMA Antenna Interfaces EM121R-GL ⚫ Main, Rx-diversity and GNSS antenna connectors ⚫ 50 Ω impedance Transmitting Power PCIe Interface ⚫ WCDMA Bands: Class 3 (24 dBm +1/-3 dB) ⚫ LTE-FDD: B30: Class 3 (20 dBm ±2 dB) Other Bands: Class 3 (23 dBm ±2 dB) ⚫ LTE-TDD: - B41 HPUE: Class 2 (25.
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LTE-A Module Series EM121R-GL Hardware Design SMS ⚫ ⚫ ⚫ ⚫ Text and PDU modes Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default Physical Characteristics ⚫ ⚫ ⚫ M.2 Key-B Size: (30.0 ±0.15) mm × (42.0 ±0.15) mm × (2.3 ±0.2) mm Weight: approx. 6.
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LTE-A Module Series EM121R-GL Hardware Design 2.3. Functional Diagram The following figure shows a functional diagram of EM121R-GL. ⚫ ⚫ ⚫ ⚫ ⚫ Power management Baseband LPDDR4X SDRAM + NAND Flash Radio frequency M.2 Key-B interface VCC GND FULL_CARD_POWER_OFF# PMIC SPMI ET 38.4MHz XO RF_CLK 38.4MHz Qlink PCIe 2.0 × 1 RFFE GPIOs WWAN_LED# Baseband Control ANT_MAIN WAKE_ON_WAN# PRx Tx/Rx Blocks USB 2.0 & USB 3.0 Tx Transceiver (U)SIM1 (U)SIM2 BB_CLK 19.
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LTE-A Module Series EM121R-GL Hardware Design 2.4. Pin Assignment The following figure shows the pin assignment of the module. The top side contains module and antenna connectors. No.
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LTE-A Module Series EM121R-GL Hardware Design 2.5. Pin Description Table 4: Definition of I/O Parameters Type Description AI Analog Input AO Analog Output AIO Analog Input/Output DI Digital Input DO Digital Output DIO Digital Input/Output OD Open Drain PI Power Input PO Power Output PU Pull Up PD Pull Down The following table shows the pin definition and description of the module. Table 5: Pin Description Pin No.
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LTE-A Module Series EM121R-GL Hardware Design 5 GND Ground 6 FULL_CARD_ POWER_OFF# DI, PD Turn on/off the module. High level: Turn on Low level: Turn off 7 USB_DP AIO USB differential data (+) 8 W_DISABLE1# DI, OD Airplane mode control. Active LOW. 9 USB_DM AIO USB differential data (-) DO, OD RF status indication LED. Active LOW. VIHmax = 4.4 V VIHmin = 1.19 V VILmax = 0.2 V 1.8/3.
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LTE-A Module Series EM121R-GL Hardware Design 27 GND Ground 28 PCM_SYNC* DIO, PD PCM data frame sync 29 USB_SS_TX_M AO USB 3.0 super-speed transmit (-) 30 USIM1_RST DO, PD (U)SIM1 card reset 31 USB_SS_TX_P AO USB 3.0 super-speed transmit (+) 32 USIM1_CLK DO, PD (U)SIM1 card clock 33 GND 34 USIM1_DATA DIO, PU (U)SIM1 card data 35 USB_SS_RX_M AI USB 3.0 super-speed receive (-) 36 USIM1_VDD PO (U)SIM1 card power supply 37 USB_SS_RX_P AI USB 3.
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LTE-A Module Series EM121R-GL Hardware Design DI, OD PCIe reset. Active LOW. 50 PCIE_RST_N 51 GND 52 PCIE_CLKREQ_N DO, OD PCIe clock request. Active LOW. 53 PCIE_REFCLK_M AIO PCIe reference clock (-) 54 PCIE_WAKE_N DO, OD PCIe wake up. Active LOW. 55 PCIE_REFCLK_P AIO PCIe reference clock (+) 56 RFFE_CLK 2) * DO, PD Used for external MIPI IC control 57 GND 58 RFFE_DATA 2) * DIO, PD Used for external MIPI IC control 1.8 V 59 ANTCTL0* DO, PD Antenna control 1.
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LTE-A Module Series EM121R-GL Hardware Design 71 GND 72 VCC 73 GND Ground PI Power supply Vmin = 3.135 V Vnom = 3.7 V Vmax = 4.4 V Ground 74 VCC PI Power supply 75 CONFIG_2 DO Not connected internally Vmin = 3.135 V Vnom = 3.7 V Vmax = 4.4 V NOTES 1) This pin is pulled up by software configuration when (U)SIM hot-plug is enabled by AT+QSIMDET 、 (the command takes effect after the module is restarted, see document [3]). 2. 2) RFFE_CLK and RFFE_DATA are reserved only for customization. 3.
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LTE-A Module Series EM121R-GL Hardware Design 3 Operating Characteristics 3.1. Operating Modes The table below briefly summarizes the various operating modes of EM121R-GL. Table 6: Overview of Operating Modes Mode Details Idle Software is active. The module has registered on the network, and it is ready to send and receive data. Talk/Data Network connected. In this mode, the power consumption is decided by network setting and data transfer rate.
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Current Consumption LTE-A Module Series EM121R-GL Hardware Design DRX OFF ON OFF ON OFF ON OFF ON OFF Run Time Figure 3: DRX Run Time and Current Consumption in Sleep Mode The following part of this section describes the power saving procedure and sleep mode entrance of the module. If the host supports USB suspend/resume and remote wakeup function, the following two conditions must be met to make the module enter sleep mode. ⚫ ⚫ Execute AT+QSCLK=1 command to enable the sleep mode.
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LTE-A Module Series EM121R-GL Hardware Design 3.1.2. Airplane mode The module provides a W_DISABLE1# pin to disable or enable airplane mode through hardware operation. See Chapter 4.5.1 for more details. 3.2. Communication Interface with the Host The module supports to communicate through both USB and PCIe interfaces, respectively referring to the USB mode and the PCIe mode as described below: USB Mode ⚫ ⚫ Support all USB 2.0/3.
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LTE-A Module Series EM121R-GL Hardware Design 3.3.1. Decrease Voltage Drop The power supply range of the module is from 3.135 V to 4.4 V. Please ensure that the input voltage will never drop below 3.135 V, otherwise the module will be powered off automatically. The following figure shows the maximum voltage drop during radio transmission in 3G/4G networks. Burst Transmission Burst Transmission Power Supply Ripple ≤ 100 mV Drop VBAT ≥ 3.
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LTE-A Module Series EM121R-GL Hardware Design 3.3.2. Reference Design for Power Supply Power design is important for the module, as the performance of the module largely depends on the power source. If the voltage difference between the input and output is not too high, it is suggested that an LDO is used when supplying power for the module. If there is a big voltage difference between the input source and the desired output (VCC = 3.7 V Typ.), a buck DC-DC converter is preferred.
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LTE-A Module Series EM121R-GL Hardware Design Table 8: Pin Definition of FULL_CARD_POWER_OFF# Pin No. Pin Name I/O Description DC Characteristics Comment 6 FULL_CARD_ POWER_OFF# DI, PD Turn on/off the module. High level: Turn on Low level: Turn off VIHmax = 4.4 V VIHmin = 1.19 V VILmax = 0.2 V Pull down with a 100 kΩ resistor. It is recommended to use a host GPIO to control FULL_CARD_POWER_OFF#. A simple reference circuit is illustrated in the following figure. Host Module 1.8 V or 3.
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LTE-A Module Series EM121R-GL Hardware Design 3.5. Turn off For the design that turns on the module with a host GPIO, when the power is supplied to VCC, pulling down FULL_CARD_POWER_OFF# pin will turn off the module. The timing of turn-off scenario is illustrated in the following figure. VCC FULL_CARD_POWER_OFF# Module Status Running Turn-off procedure OFF T1 Figure 10: Turn-off Timing through FULL_CARD_POWER_OFF# Table 10: Turn-off Timing of the Module Symbol Min. T1 3s Typ. Max.
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LTE-A Module Series EM121R-GL Hardware Design NOTE Triggering the RESET# signal will lead to loss of all data in the modem and removal of system drivers. It will also disconnect the modem from the network. The module can be reset by pulling down the RESET# pin for 250–600 ms. An open collector/drain driver or a button can be used to control the RESET# pin. Host Module Reset Logic 1.
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LTE-A Module Series EM121R-GL Hardware Design VCC RESET# Module Status Running Restarting Resetting T Figure 13: Reset Timing of the Module Table 12: Reset Timing of the Module Symbol T Min. 250 ms Typ. 500 ms EM121R-GL Hardware Design Max. Comment 600 ms RESET# should be pulled down for 250–600 ms. An asserting time of less than 200 ms is unreliable, while that of higher than 600 ms may lead to module reset for several times.
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LTE-A Module Series EM121R-GL Hardware Design 4 Application Interfaces The physical connections and signal levels of EM121R-GL comply with PCI Express M.2 specification. This chapter mainly describes the definition and application of the following interfaces/pins of the module: ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ (U)SIM interfaces USB interface PCIe interface PCM interface* Control and indication interfaces Cellular/WLAN COEX interface* Antenna tuner control interface* Configuration pins 4.1.
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LTE-A Module Series EM121R-GL Hardware Design 42 USIM2_DATA DIO, PU (U)SIM2 card data USIM2_VDD 1.8/3.0 V 44 USIM2_CLK DO, PD (U)SIM2 card clock USIM2_VDD 1.8/3.0 V 46 USIM2_RST DO, PD (U)SIM2 card reset USIM2_VDD 1.8/3.0 V 48 USIM2_VDD PO (U)SIM2 card power supply 1.8/3.0 V EM121R-GL supports (U)SIM card hot-plug via the USIM1_DET pin, which is a level triggered pin. The USIM1_DET is normally short-circuited to ground when (U)SIM card is not inserted.
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LTE-A Module Series EM121R-GL Hardware Design Maximum Response Time 300 ms Characteristics The command takes effect after the module is restarted. The configuration will be saved to NVRAM automatically. Parameter Integer type. Enable or disable (U)SIM card detection. 0 Disable 1 Enable Integer type. The level of (U)SIM detection pin when a (U)SIM card is inserted. 0 Low level 1 High level NOTES 1. 2. 3. 4.
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LTE-A Module Series EM121R-GL Hardware Design USIM_VDD Module (U)SIM Card Connector 100 nF 10-20k USIM_VDD VCC 22R USIM_RST 22R USIM_CLK VPP RST CLK USIM_DET CD 22R 33 pF GND 33 pF IO 33 pF USIM_DATA GND ESD Note: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout. Figure 14: Reference Circuit for Normally Closed (U)SIM Card Connector 4.1.4.
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LTE-A Module Series EM121R-GL Hardware Design 4.1.5. (U)SIM Card Connector Without Hot-plug If the (U)SIM card detection function is not needed, please keep USIM_DET unconnected. A reference circuit for the (U)SIM card interface with a 6-pin (U)SIM card connector is illustrated by the following figure.
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LTE-A Module Series EM121R-GL Hardware Design 4.1.7. (U)SIM Design Notices To enhance the reliability and availability of the (U)SIM card in applications, please follow the criteria below in (U)SIM circuit design. ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ Place the (U)SIM card connector as close to the module as possible. Keep the trace length less than 200 mm. Keep (U)SIM card signals away from RF and VCC traces. Make sure the ground between the module and the (U)SIM card connector is short and wide.
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LTE-A Module Series EM121R-GL Hardware Design 37 USB_SS_RX_P AI USB 3.0 super-speed receive (+) For more details about the USB 3.0 & 2.0 specifications, please visit http://www.usb.org/home. The USB 2.0 interface is recommended to be reserved for firmware upgrade in designs. The following figure presents a reference circuit for the USB 3.0 & 2.0 interface.
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LTE-A Module Series EM121R-GL Hardware Design ⚫ ⚫ than 1.0 pF for USB 2.0, and less than 0.15 pF for USB 3.0. Keep the ESD protection devices as close to the USB connector as possible. If possible, reserve 0 Ω resistors on USB_DP and USB_DM lines respectively. 4.3. PCIe Interface The module provides one integrated PCIe interface, featuring as follows: ⚫ ⚫ PCI Express Base Specification Revision 2.0 compliant Data rate up to 5 Gbps per lane 4.3.1.
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LTE-A Module Series EM121R-GL Hardware Design 4.3.2. Reference Design for PCIe The following figure shows a reference circuit for the PCIe interface.
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LTE-A Module Series EM121R-GL Hardware Design 4.3.3. PCIe Timing The following figure is PCIe power-on timing sequence for an adapter powered from system power rail in PCI Express M.2 specification. Figure 20: PCIe Power-on Timing Requirements of M.2 Specification The following table is power-on timing variables in PCI Express M.2 specification. Table 16: Power-up Timing of M.2 Specification Symbol Min. Typ. Max.
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LTE-A Module Series EM121R-GL Hardware Design VCC T1 FULL_CARD_POWER_OFF# T2 RESET# T3 PCIE_RST_N Typical 11.6 s Module State OFF Booting Active Figure 21: PCIe Turn-on Timing of the Module Table 17: PCIe Turn-on Timing of the Module Index Min. Typ. Max. Comment T1 0 ms 50 ms - The module is turning on. T2 0 ms - 200 ms De-assert RESET# after de-asserting FULL_CARD_POWER_OFF#. T3 100 ms - - De-assert PCIE_RST_N 100 ms after de-asserting RESET#. 4.3.3.2.
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LTE-A Module Series EM121R-GL Hardware Design VCC RESET# T2 FULL_CARD_POWER_OFF# T1 PCIE_RST_N Module State Active Power off procedure OFF Figure 22: PCIe Turn-off Timing through FULL_CARD_POWER_OFF# Table 18: PCIe Turn-off Timing through FULL_CARD_POWER_OFF# Index Min. Typ. Max. Comment T1 20 ms - - PCIe interface is disabled by asserting PCIE_RST_N. - Module is powering off and it stops reading and writing Flash, data protection, etc. If the power is always on, T2 could be ignored.
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LTE-A Module Series EM121R-GL Hardware Design Table 19: PCIe Reset Timing Index Min. Typ. Max. Comment T1 20 ms - - PCIe interface is disabled by asserting PCIE_RST_N. T2 0 ms - - Module is reset by asserting RESET#. T3 0 ms - - T3 could be ignored. T4 100 ms - - De-assert PCIE_RST_N 100 ms after de-asserting RESET#. T5 250 ms 500 ms - 4.3.3.4. PCIe Modern Standby Timing EM121R-GL supports D3 Hot and D3 Cold state in Win 10 system.
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LTE-A Module Series EM121R-GL Hardware Design VCC(H) FULL_CARD_POWER_OFF#(H) RESET#(H) PCIE_RST_N Module State T1 D0 D3 hot D3 cold D0 Figure 25: PCIe D3 Cold Timing 4.4. PCM Interface* The module supports audio communication via Pulse Code Modulation (PCM) digital interface.
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LTE-A Module Series EM121R-GL Hardware Design 125 μs PCM_CLK 1 2 255 256 PCM_SYNC PCM_DOUT MSB LSB MSB PCM_DIN MSB LSB MSB Figure 26: Primary Mode Timing 125 μs PCM_CLK 1 2 31 32 PCM_SYNC PCM_DOUT MSB LSB MSB PCM_DIN MSB LSB MSB Figure 27: Auxiliary Mode Timing The following table shows the pin definition of PCM interface which can be applied to audio codec design. Table 20: Pin Definition of PCM Interface Pin No.
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LTE-A Module Series EM121R-GL Hardware Design The clock and mode can be configured by AT command, and the default configuration is master mode using short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. See document [3] for details about AT+QDAI command. 4.5. Control and Indication Interfaces Table 21: Pin Definition of Control and Indication Interfaces Pin No. Pin Name I/O Description DC Characteristics 8 W_DISABLE1# DI, OD Airplane mode control. Active LOW. 1.8/3.
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LTE-A Module Series EM121R-GL Hardware Design High Level AT+CFUN=0 AT+CFUN=4 Disabled Low Level AT+CFUN=0 AT+CFUN=1 AT+CFUN=4 Disabled 4.5.2. W_DISABLE2# The module provides a W_DISABLE2# pin to disable or enable the GNSS function. The W_DISABLE2# pin is pulled up by default. Driving it low will disable the GNSS function. The combination of W_DISABLE2# pin and AT commands can control the GNSS function.
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LTE-A Module Series EM121R-GL Hardware Design 4.5.3. WWAN_LED# The WWAN_LED# signal is used to indicate RF status of the module, and its sink current is up to 10 mA. To reduce current consumption of the LED, a current-limited resistor must be placed in series with the LED, as illustrated in the figure below. The LED is ON when the WWAN_LED# signal is at low level. Module VCC (Typ. 3.
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LTE-A Module Series EM121R-GL Hardware Design Table 25: State of the WAKE_ON_WAN# WAKE_ON_WAN# State Module Operation Status Output a 1 s low level pulse signal Call/SMS/Data is incoming (to wake up the host) Always at high level Idle/Sleep Host Module VCC_IO_HOST R1 10k WAKE_ON_WAN# 23 GPIO H L BB 1s Wake up the host Note: The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23. Figure 30: WAKE_ON_WAN# Signal Reference Circuit 4.5.5.
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LTE-A Module Series EM121R-GL Hardware Design Table 27: Pin definition of WLAN_PA_EN for EM121R-GL Pin No. Pin Name I/O Description Comment 60 WLAN_PA_EN DI, PD Self-protection of QLN4650 control 1.8 V 4.6. Cellular/WLAN COEX Interface* The module provides the cellular/WLAN COEX interface, the following table shows the pin definition of this interface. Table 28: Pin Definition of COEX Interface Pin No.
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LTE-A Module Series EM121R-GL Hardware Design 4.7.2. Antenna Tuner Control Interface through RFFE Table 30: Pin Definition of Antenna Tuner Control Interface through RFFE Pin No. Pin Name I/O Description DC Characteristics 56 RFFE_CLK DO, PD Used for external MIPI IC control 1.8 V 58 RFFE_DATA DIO, PD Used for external MIPI IC control 1.8 V NOTE RFFE_CLK and RFFE_DATA are reserved only for customization. 4.8.
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LTE-A Module Series EM121R-GL Hardware Design Host Module VCC_IO_HOST R2 R3 R1 R4 100K 100K 100K 100K CONFIG_0 21 0Ω CONFIG_1 69 0Ω GPIO CONFIG_2 75 NM-0 Ω GPIO CONFIG_3 1 NM-0 Ω GPIO GPIO Note: The voltage level VCC_IO_HOST depends on the host side, and could be a 1.8 V or 3.3 V voltage level.
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LTE-A Module Series EM121R-GL Hardware Design 5 RF Characteristics 5.1. Cellular Antenna Interfaces EM121R-GL provides Main, Rx-diversity and GNSS antenna connectors which are used to resist the fall of signals caused by high-speed movement and multipath effect. The impedance of antenna ports is 50 Ω. 5.1.1.
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LTE-A Module Series EM121R-GL Hardware Design WCDMA B6 830–840 875–885 MHz WCDMA B8 880–915 925–960 MHz WCDAM B19 830–845 875–890 MHz LTE-FDD B1 1920–1980 2110–2170 MHz LTE-FDD B2 1850–1910 1930–1990 MHz LTE-FDD B3 1710–1785 1805–1880 MHz LTE-FDD B4 1710–1755 2110–2155 MHz LTE-FDD B5 824–849 869–894 MHz LTE-FDD B7 2500–2570 2620–2690 MHz LTE-FDD B8 880–915 925–960 MHz LTE-FDD B12 699–716 729–746 MHz LTE-FDD B13 777–787 746–756 MHz LTE-FDD B14 788–798 758–76
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LTE-A Module Series EM121R-GL Hardware Design LTE-TDD B41 2496–2690 2496–2690 MHz LTE-TDD B46 1) - 5150–5925 MHz LTE-TDD B48 3550–3700 3550–3700 MHz LTE-FDD B66 1710–1780 2110–2200 MHz NOTE 1) LTE-FDD B29/32 and LTE-TDD B46 support Rx only and are only for secondary component carrier. 5.1.3. Receiving Sensitivity Table 35: EM121R-GL Dual-Antenna Conducted Receiving Sensitivity Frequency Bands RX Sensitivity 1) (Typical) (dBm) 3GPP (dBm) WCDMA B1 -110.5 -106.7 WCDMA B2 -110 -104.
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LTE-A Module Series EM121R-GL Hardware Design LTE-FDD B8 -101 -93.3 10 MHz LTE-FDD B12 -102 -93.3 10 MHz LTE-FDD B13 -102 -93.3 10 MHz LTE-FDD B14 -101.5 -93.3 10 MHz LTE-FDD B18 -102 -96.3 10 MHz LTE-FDD B19 -102 -96.3 10 MHz LTE-FDD B20 -102 -93.3 10 MHz LTE-FDD B25 -100.5 -92.8 10 MHz LTE-FDD B26 -101.9 -93.8 10 MHz LTE-FDD B28 -102 -94.8 10 MHz LTE-FDD B30 -99 -95.3 10 MHz LTE-TDD B38 -100.1 -96.3 10 MHz LTE-TDD B39 -100.5 -96.
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LTE-A Module Series EM121R-GL Hardware Design WCDMA B1 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B2 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B3 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B4 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B5 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B6 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B8 BPSK 24 dBm +1/-3 dB < -50 dBm WCDMA B19 BPSK 24 dBm +1/-3 dB < -50 dBm LTE-FDD B1 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B2 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB
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LTE-A Module Series EM121R-GL Hardware Design LTE-TDD B38 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-TDD B39 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-TDD B40 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-TDD B41 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-TDD B41 HPUE QPSK 25.
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LTE-A Module Series EM121R-GL Hardware Design LTE-FDD B13 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B14 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B18 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B19 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B20 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B25 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B26 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B28 QPSK 23 dBm ±2 dB < -40 dBm 10 MHz, 1RB LTE-FDD B
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LTE-A Module Series EM121R-GL Hardware Design 5.2.2. Connector Definition Table 38: EM121R-GL Connector Definition of Antenna Interfaces Connector Name I/O Description Comment GNSS Antenna AI GNSS Antenna connector: ⚫ GNSS: L1, L5 50 Ω impedance 5.2.3. GNSS Frequency Table 39: GNSS Frequency Type Frequency Unit GPS L1/Galileo 1575.42 ±1.023 MHz GPS L5 1176.45 ±1.023 MHz GLONASS 1601.65 ±4.15 MHz BeiDou/COMPASS 1561.098 ±2.
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LTE-A Module Series EM121R-GL Hardware Design 5.2.4. GNSS Performance Table 40: EM121R-GL GNSS Performance Parameter Sensitivity (GNSS) Description Conditions Typ. Unit Cold start Autonomous -148 dBm Reacquisition Autonomous -160 dBm Tracking Autonomous -159 dBm Autonomous 27.46 s XTRA enabled 17.07 s Autonomous 26.45 s XTRA enabled 1.53 s Autonomous 1.02 s XTRA enabled 1.03 s Autonomous @ open sky 2.
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LTE-A Module Series EM121R-GL Hardware Design Figure 33: Antenna Connectors on the EM121R-GL Module 5.3.2. Antenna Connector Size Standard 2 mm × 2 mm receptacle antenna connectors are mounted for convenient antenna connection.
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LTE-A Module Series EM121R-GL Hardware Design Figure 34: EM121R-GL RF Connector Dimensions (Unit: mm) Table 41: Major Specifications of the RF Connector Item Specification Nominal Frequency Range DC to 6 GHz Nominal Impedance 50 Ω Temperature Rating -40 to +85 °C Voltage Standing Wave Ratio (VSWR) Meet the requirements of: Max. 1.3 (DC–3 GHz) Max. 1.4 (3–6 GHz) 5.3.3.
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LTE-A Module Series EM121R-GL Hardware Design Figure 36: Specifications of Mating Plugs Using Ø 0.81 mm Coaxial Cables The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a Ø 0.81 mm coaxial cable. Figure 37: Connection between RF Connector and Mating Plug Using Ø 0.81 mm Coaxial Cable The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a Ø 1.
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LTE-A Module Series EM121R-GL Hardware Design Figure 38: Connection between RF Connector and Mating Plug Using Ø 1.13 mm Coaxial Cable 5.4. Antenna Requirements Table 42: Antenna Requirements of EM121R-GL Type Requirements Main Antenna (Tx/Rx) VSWR: ≤ 2 Efficiency: > 30 % Max Input Power: 50 W Input Impedance: 50 Ω Cable Insertion Loss: < 1 dB (699–960 MHz) Cable Insertion Loss: < 1.
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LTE-A Module Series EM121R-GL Hardware Design LNA Noise Figure: < 1.5 dB LNA Gain: 14.5 ±5 dB Input Impedance: 50 Ω BeiDou/COMPASS; Galileo NOTE 1) VDD voltage is 1.8 V.
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LTE-A Module Series EM121R-GL Hardware Design 6 Electrical Characteristics and Reliability 6.1. Power Supply Requirements The typical input voltage of the module is 3.7 V. The following table shows the power supply requirements of the module. Table 43: Power Supply Requirements Parameter Description Min. Typ. Max. Unit VCC Power Supply 3.135 3.7 4.4 V Voltage Ripple - - 30 100 mV Voltage Drop - - - 165 mV 6.2. Current Consumption 6.2.1.
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LTE-A Module Series EM121R-GL Hardware Design 6.2.2. USB Version Table 45: EM121R-GL Current Consumption (USB Only Version, 3.7 V Power Supply) Description Conditions Typ. Unit OFF state Power down 66 μA 6.3. Digital I/O Characteristic Table 46: Logic Levels of Digital I/O (1.8 V) Parameter Description Min. Max. Unit VIH Input high voltage 1.65 2.1 V VIL Input low voltage -0.3 0.54 V VOH Output high voltage 1.3 1.8 V VOL Output low voltage 0 0.4 V Table 47: (U)SIM 1.
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LTE-A Module Series EM121R-GL Hardware Design VIH Input high voltage 0.7 × USIM_VDD USIM_VDD + 0.3 V VIL Input low voltage -0.3 0.2 × USIM_VDD V VOH Output high voltage 0.8 × USIM_VDD USIM_VDD V VOL Output low voltage 0 0.4 V 6.4. Electrostatic Discharge The module is not protected against electrostatic discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components.
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LTE-A Module Series EM121R-GL Hardware Design Figure 39: Thermal Dissipation Area on Bottom Side of Module There are other measures to enhance the heat dissipation performance: ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ Add as many ground vias as possible on PCB. Maximize the airflow over/around the module. Place the module away from other heating sources. Module mounting holes must be used to attach (ground) the device to the main PCB ground.
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LTE-A Module Series EM121R-GL Hardware Design 6.6. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 50: Absolute Maximum Ratings Parameter Min. Max. Unit VCC -0.3 4.7 V 6.7. Operating and Storage Temperatures Table 51: Operating and Storage Temperatures Parameter Min. Typ. Max.
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LTE-A Module Series EM121R-GL Hardware Design 7 Mechanical Dimensions and Packaging This chapter mainly describes mechanical dimensions and packaging specifications of EM121R-GL. All dimensions are measured in mm, and the tolerances are ±0.2 mm unless otherwise specified. 7.1.
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LTE-A Module Series EM121R-GL Hardware Design 7.2. Top and Bottom Views of the Module TOP BOTTOM Figure 41: EM121R-GL Top View and Bottom View NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. 7.3. M.2 Connector EM121R-GL adopts a standard PCI Express M.2 connector which compiles with the directives and standards listed in PCI Express M.2 Specification. 7.4.
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LTE-A Module Series EM121R-GL Hardware Design Figure 42: Tray Size (Unit: mm) Each tray contains 10 modules. The smallest package contains 100 modules. Tray packaging procedures are as below. 1. 2. 3. 4. 5. 6. Use 10 trays to package 100 modules at a time (tray size: 247 mm × 172 mm). Place an empty tray on the top of the 10-tray stack. Fix the stack with masking tape in “#” shape as shown in the following figure. Pack the stack with conductive bag, and then fix the bag with masking tape.
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LTE-A Module Series EM121R-GL Hardware Design 8 Appendix References Table 52: Related Documents SN. Document Name Description [1] Quectel_EM121R-GL_CA_Feature EM121R-GL CA Feature [2] Quectel_PCIe_Card_EVB_User_Guide PCIE card EVB user guide [3] Quectel_EG512R&EM1x0R_Series_AT_Commands_ Manual AT commands manual for EG512R and EM1x0R-GL series and EM121R-GL. [4] Quectel_EM1x0R-GL&EG512R_Series_GNSS_ Application_Note The GNSS application note for EM1x0R-GL & EG512R_Series and EM121R-GL.
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LTE-A Module Series EM121R-GL Hardware Design EIRP Equivalent Isotropically Radiated Power ESD Electrostatic Discharge FDD Frequency Division Duplexing GLONASS Global Navigation Satellite System (Russia) GNSS Global Navigation Satellite System GPS Global Positioning System GSM Global System for Mobile Communications HSPA High Speed Packet Access HSUPA High Speed Uplink Packet Access kbps Kilo Bits Per Second LAA License Assisted Access LED Light Emitting Diode LTE Long Term Evoluti
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LTE-A Module Series EM121R-GL Hardware Design PME Power Management Event PPP Point-to-Point Protocol QPSK Quadrature Phase Shift Keying RB Resource Block RF Radio Frequency RFFE RF Front-End R.
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OEM/Integrators Installation Manual Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
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Antenna (1) The antenna must be installed such that 20 cm is maintained between the antenna and users, (2) The transmitter module may not be co-located with any other transmitter or antenna. In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product.
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Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
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This device is intended only for OEM integrators under the following conditions: (For module device use) 1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and 2) The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.
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Industry Canada Statement This device complies with Industry Canada’s licence-exempt RSSs. Operation is subject to the following two conditions: (1) This device may not cause interference; and (2) This device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence.
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Cet appareil est conçu uniquement pour les intégrateurs OEM dans les conditions suivantes: (Pour utilisation de dispositif module) 1) L'antenne doit être installée de telle sorte qu'une distance de 20 cm est respectée entre l'antenne et les utilisateurs, et 2) Le module émetteur peut ne pas être coïmplanté avec un autre émetteur ou antenne. Tant que les 2 conditions ci-dessus sont remplies, des essais supplémentaires sur l'émetteur ne seront pas nécessaires.
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Manual Information to the End User The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.