Service Guide

LTE Standard Module Series
EG91_Series_Hardware_Design
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Table 12: Pin Definition of Debug UART Interface
The module provides 1.8 V UART interfaces. A voltage-level translator should be used if your application
is equipped with a 3.3 V UART interface. A voltage-level translator TXS0108EPWR provided by Texas
Instruments is recommended. The following figure shows a reference design.
Figure 20: Reference Circuit with Translator Chip
Visit http://www.ti.com
for more information.
Another example with transistor translation circuit is shown as below. For the design of circuits shown in
dotted lines, see that shown in solid lines, but please pay attention to the direction of connection.
RTS 37 DI Request to send
DTR 30 DI
Data terminal ready
Sleep mode control
TXD 35 DO Transmit
RXD 34 DI Receive
Pin Name Pin No. I/O Description Comment
DBG_TXD 23 DO Debug UART transmit
1.8 V power domain.
If unused, keep it open.
DBG_RXD 22 DI Debug UART receive