Product Info

LTE Standard Module Series
EC25 Series Hardware Design
EC25_Series_Hardware_Design 53 / 134
USB_DP
USB_DM
GND
USB_DP
USB_DM
GND
L1
Close to Module
R3
R4
Test Points
ESD Array
NM_0R
NM_0R
Minimize these stubs
Module
MCU
USB_VBUS
VDD
Figure 19: Reference Circuit of USB Application
A common mode choke L1 is recommended to be added in series between the module and customer’s
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0 Ω resistors (R3 and R4) should
be added in series between the module and the test points so as to facilitate debugging, and the resistors
are not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components
must be placed close to the module, and also these resistors should be placed close to each other. The
extra stubs of trace must be as short as possible.
The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.
It is important to route the USB signal traces as differential pairs with ground surrounded. The
impedance of USB differential trace is 90 Ω.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer of the PCB, and surround the traces with
ground on that layer and with ground planes above and below.
Junction capacitance of the ESD protection device might cause influences on USB data lines, so
please pay attention to the selection of the device. Typically, the stray capacitance should be less
than 2 pF.
Keep the ESD protection devices to the USB connector as close as possible.
3.11. UART Interfaces
The module provides two UART interfaces: the main UART interface and the debug UART interface. The
following shows their features.
The main UART interface supports 4800 bps, 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200