Product Info

LTE Standard Module Series
EC21_Series_Mini_PCIe_Hardware_Design
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Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. In addition, EC21
series Mini PCIe’s firmware has integrated the configuration on some PCM codec’s application with I2C
interface. See document [1] for details about AT+QDAI.
The following figure shows a reference design of PCM interface with an external codec IC.
Figure 10: Reference Circuit of PCM Application with Audio Codec
3.10. Control and Indication Interfaces
The following table shows the pin definition of control and indication interfaces.
Table 12: Pin Definition of Control and Indication Interfaces
Pin Name Pin No. I/O Description Comment
RI 17 DO Ring indication 3.3 V power domain.
DTR 31 DI Sleep mode control 3.3 V power domain.
W_DISABLE# 20 DI Airplane mode control
3.3 V power domain.
Pulled up by default.
Active LOW.
PERST# 22 DI Fundamental reset
3.3 V power domain.
Pulled up by default.
Active LOW.
LED_WWAN# 42 OC
LED signal for indicating the network
status of the module
Active LOW.
WAKE# 1 OC Wake up the host