Product Info

Automotive Module Series
AG521R-NA QuecOpen Hardware Design
AG521R-NA_QuecOpen_Hardware_Design 27 / 104
I2S Interface (for Codec Configuration by Default)
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
CDC_RST
77
DO
Codec reset
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
Can be configured to
GPIO.
If unused, keep them
open.
I2S_MCLK
81
DO
Clock output for
codec
V
OL
max = 0.45 V
V
OH
min = 1.35 V
I2S_WS
265
IO
I2S word select
V
OL
max = 0.45 V
V
OH
min = 1.35 V
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
I2S_SCK
262
DO
I2S clock
V
OL
max = 0.45 V
V
OH
min = 1.35 V
I2S_DIN
263
DI
I2S data in
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
I2S_DOUT
261
DO
I2S data out
V
OL
max = 0.45 V
V
OH
min = 1.35 V
PCM Interface
Pin Name
Pin No.
I/O
Description
DC
Characteristics
Comment
PCM_SYNC
73
IO
PCM data frame sync
V
OL
max = 0.45 V
V
OH
min = 1.35 V
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
Can be configured to
GPIO.
If unused, keep them
open.
PCM_CLK
75
IO
PCM clock
V
OL
max = 0.45 V
V
OH
min = 1.35 V
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
PCM_IN
76
DI
PCM data input
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
PCM_OUT
78
DO
PCM data output
V
OL
max = 0.45 V
V
OH
min = 1.35 V