Product Info

Automotive Module Series
AG521R-NA QuecOpen Hardware Design
AG521R-NA_QuecOpen_Hardware_Design 58 / 104
The following figure shows the simplified block diagram for Ethernet application.
Module
Ethernet
PHY
CMC
RGMII
MDIO
RXD
TXD
MDIO
MDIP/N
Figure 27: Simplified Block Diagram for Ethernet Application
The following figure shows a reference design of RGMII interface with PHY application.
RGMII_TX_0
20
DO
RGMII transmit data bit 0
RGMII_CTL_TX
21
DO
RGMII transmit control
RGMII_TX_1
22
DO
RGMII transmit data bit 1
RGMII_TX_2
23
DO
RGMII transmit data bit 2
RGMII_CK_TX
24
DO
RGMII transmit clock
RGMII_TX_3
25
DO
RGMII transmit data bit 3
RGMII_PWR_EN
27
DO
Enable external LDO to supply
power to RGMII_PWR_IN
1.8 V power domain
RGMII_PWR_IN
28
PI
Power input for internal RGMII
circuit
1.8/2.5 V
power supply input.
If RGMII interface is not
used, please connect it to
VDD_EXT.
RGMII_INT
29
DI
RGMII PHY interrupt output
1.8 V power domain
RGMII_RST
31
DO
Reset output for RGMII PHY