Product Info

LTE Standard Module Series
EG95 Series Hardware Design
EG95_Series_Hardware_Design
52 / 99
4.7K
4.7K
BIAS
MICBIAS
PCM_CLK
PCM_SYNC
PCM_DOUT
PCM_DIN
I2C_SCL
I2C_SDA
BCLK
LRCK
DAC
ADC
SCL
SDA
INP
INN
LOUTP
LOUTN
Module Codec
1.8 V
Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec
NOTES
1. It is recommended to reserve an RC (R = 22 Ω, C = 22 pF) circuit on the PCM lines, especially for
PCM_CLK.
2. EG95 works as a master device pertaining to I2C interface.
3.13. SPI Interface
SPI interface of EG95 acts as the master only. It provides a duplex, synchronous and serial communication
link with the peripheral devices. It is dedicated to one-to-one connection, without chip select. Its operation
voltage is 1.8 V with clock rates up to 50 MHz.
The following table shows the pin definition of SPI interface.
Table 15: Pin Definition of SPI Interface
Pin Name
Pin No.
I/O
Description
Comment
SPI_CLK
26
DO
Clock signal of SPI interface
1.8 V power domain
SPI_MOSI
27
DO
Master output slave input of SPI
interface
1.8 V power domain