Product Info

LTE Standard Module Series
EG95 Series Hardware Design
EG95_Series_Hardware_Design
49 / 99
10K
10K
V
OL
0
0.45
V
V
OH
1.35
1.8
V
The module provides 1.8 V UART interfaces. A level translator should be used if customers’ application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is
recommended. The following figure shows a reference design.
VDD_EXT
0.1 μF
VCCA VCCB
0.1 μF
VDD_MCU
RI
DCD
CTS
RTS
DTR
TXD
RXD
120K
51K
OE
A1
A2
A3
Translator
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
51K
RI_MCU
DCD_MCU
CTS_MCU
RTS_MCU
DTR_MCU
TXD_MCU
RXD_MCU
Figure 20: Reference Circuit with Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. For the design of circuits in dotted
lines, please refer to that of circuits in solid lines, but please pay attention to the direction of connection.
MCU/ARM
TXD
RXD
VDD_EX
T
4.7K
1 nF
1 nF
VDD_EXT
10K
Module
RXD
TXD
RTS
CTS
GPIO
EINT
VCC_MCU 4.7K
VDD_EX
T
RTS
CTS
DT
R RI
GPIO DCD
GND
GND
Figure 21: Reference Circuit with Transistor Circuit
NOTE
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps.