EG95 Series Hardware Design LTE Standard Module Series Version: 1.8 Date: 2020-08-24 Status: Preliminary www.quectel.
LTE Standard Module Series EG95 Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
LTE Standard Module Series EG95 Series Hardware Design About the Document Revision History Version 1.0 1.1 1.2 Date Author Description 2017-03-22 Felix YIN/ Yeoman CHEN/ Jackie WANG Initial Yeoman CHEN/ Rex WANG 1. Added band B28A. 2. Updated the description of UMTS and GSM features in Table 2. 3. Updated the functional diagram in Figure 1. 4. Updated module operating frequencies in Table 21. 5. Updated current consumption in Table 26. 6.
LTE Standard Module Series EG95 Series Hardware Design 9. Updated module operating frequencies in Table 22. 10. Added description of GNSS antenna interface in Chapter 5.2. 11. Updated antenna requirements in Table 25. 12. Updated RF output power in Table 32. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 1.3 2019-05-24 Ward WANG/ Nathan LIU/ Rex WANG 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. EG95_Series_Hardware_Design Added variant EG95-EX and related information. Updated functional diagram in Figure 1.
LTE Standard Module Series EG95 Series Hardware Design 21. Added description of USB_BOOT interface in Chapter 3.18. 22. Updated description of manufacturing and soldering in Chapter 8.2. 1. 2. 1.4 1.5 1.6 1.7 2019-07-05 2019-08-09 2019-11-07 2020-04-15 EG95_Series_Hardware_Design Updated supported protocols (Table 2). Updated timing of turning on module (Figure 12). DFOTA is developed. Updated description of USB_BOOT interface and timing sequence for entering emergency download mode (Chapter 3.
LTE Standard Module Series EG95 Series Hardware Design 1.8 2020-08-24 EG95_Series_Hardware_Design Frank WANG Added EG95-AUX and related information (Table 1, 36 and 43).
LTE Standard Module Series EG95 Series Hardware Design Contents About the Document ...................................................................................................................................2 Contents .......................................................................................................................................................6 Table Index .........................................................................................................................
LTE Standard Module Series EG95 Series Hardware Design 3.15. 3.16. 3.17. 3.18. STATUS .................................................................................................................................. 51 ADC Interface ......................................................................................................................... 52 Behaviors of RI........................................................................................................................
LTE Standard Module Series EG95 Series Hardware Design Table Index Table 1: Frequency Bands of EG95 Series Module.................................................................................... 14 Table 2: Key Features of EG95 Module...................................................................................................... 15 Table 3: IO Parameters Definition ...............................................................................................................
LTE Standard Module Series EG95 Series Hardware Design Table 43: EG95-AUX Conducted RF Receiving Sensitivity ........................................................................ 79 Table 44: Electrostatic Discharge Characteristics (25 ºC, 45% Relative Humidity) .................................... 80 Table 45: Recommended Thermal Profile Parameters ............................................................................... 89 Table 46: Related Documents..............................................
LTE Standard Module Series EG95 Series Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 18 Figure 2: Pin Assignment (Top View).......................................................................................................... 21 Figure 3: Sleep Mode Application via UART...............................................................................................
LTE Standard Module Series EG95 Series Hardware Design Figure 42: Module Bottom Dimensions (Top View) .................................................................................... 84 Figure 43: Recommended Footprint (Top View) ......................................................................................... 85 Figure 44: Top View of the Module ............................................................................................................. 86 Figure 45: Bottom View of the Module.
LTE Standard Module Series EG95 Series Hardware Design 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3. The separate approval is required for all other operating configurations, including portable configurations with respect to Part 2.1093 and different antenna configurations 4. For FCC Part 15.
LTE Standard Module Series EG95 Series Hardware Design be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one of the following measures: - Reorient or relocate the receiving antenna. - Increase the separation between the equipment and receiver. - Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. - Consult the dealer or an experienced radio/TV technician for help.
LTE Standard Module Series EG95 Series Hardware Design 1 Introduction This document defines EG95 series module, and describes its air interface and hardware interfaces which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of EG95 series module.
LTE Standard Module Series EG95 Series Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating EG95 series module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
LTE Standard Module Series EG95 Series Hardware Design 2 Product Concept 2.1. General Description EG95 series module is an embedded 4G wireless communication module with receive diversity. It supports LTE-FDD/WCDMA/GSM wireless communication, and provides data connectivity on LTE-FDD, DCHSDPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and GPRS networks. It can also provide voice functionality 1) to meet customers’ specific application demands.
LTE Standard Module Series EG95 Series Hardware Design With a compact profile of 29.0mm × 25.0mm × 2.3mm, EG95 can meet almost all requirements for M2M applications such as automotive, smart metering, tracking system, security, router, wireless POS, mobile computing device, PDA phone, tablet PC, etc. EG95 is an SMD type module which can be embedded into applications through its 106 LGA pads. EG95 is integrated with internet service protocols like TCP, UDP and PPP.
LTE Standard Module Series EG95 Series Hardware Design Support GPRS multi-slot class 33 (33 by default) Coding scheme: CS-1, CS-2, CS-3 and CS-4 Max 107 kbps (DL), Max 85.6 kbps (UL) EDGE: Support EDGE multi-slot class 33 (33 by default) Support GMSK and 8-PSK for different MCS (Modulation and Coding Scheme) Downlink coding schemes: MCS 1-9 Uplink coding schemes: MCS 1-9 Max 296 kbps (DL)/Max 236.
LTE Standard Module Series EG95 Series Hardware Design 115200 bps baud rate SPI Interface Provides a duplex, synchronous and serial communication link with the peripheral devices. Dedicated to one-to-one connection, without chip selection. 1.8 V operation voltage with clock rates up to 50 MHz. Rx-diversity Support LTE/WCDMA Rx-diversity GNSS Features Gen8C Lite of Qualcomm Protocol: NMEA 0183 Data update rate: 1Hz by default AT Commands Compliant with 3GPP TS 27.007, 27.
LTE Standard Module Series EG95 Series Hardware Design 2.3. Functional Diagram The following figure shows a block diagram of EG95 and illustrates the major functional parts. • • • • • Power management Baseband DDR+NAND flash Radio frequency Peripheral interfaces ANT_MAIN ANT_GNSS PAM 1) ANT_DIV Switch SAW Duplexer LNA SAW VBAT_RF PA SAW PRx GPS DRx Tx NAND DDR2 SDRAM Transceiver IQ VBAT_BB PMIC Control Control PWRKEY Baseband RESET_N STATUS 19.
LTE Standard Module Series EG95 Series Hardware Design 2.4. Evaluation Board In order to help customers develop applications with EG95, Quectel supplies an evaluation board (UMTS<E EVB), USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [7].
LTE Standard Module Series EG95 Series Hardware Design 3 Application Interfaces 3.1. General Description EG95 is equipped with 62 SMT pads and 44-pin ground/reserved pads that can be connected to cellular application platform. The subsequent chapters will provide detailed descriptions of the following functions/interfaces.
LTE Standard Module Series EG95 Series Hardware Design 3.2. Pin Assignment GND NC VBAT_RF VBAT_RF GND GND RESERVED (Pin 56 on EG95-E) ANT_DIV (EG95-NA/-EX/-NAX/-AUX) NC GND GND ANT_MAIN GND GND The following figure shows the pin assignment of EG95 module.
LTE Standard Module Series EG95 Series Hardware Design NOTES 1. 2. 3. 4. 1) PWRKEY output voltage is 0.8 V because of the diode drop in the Qualcomm chipset. Keep all RESERVED pins and unused pins unconnected. GND pads should be connected to ground in the design. Please note that the definition of pin 49 and 56 are different among EG95-E and EG95-NA/-EX/NAX/-AUX. For more details, please refer to Table 4. 3.3. Pin Description The following tables show the pin definition of EG95 module.
LTE Standard Module Series EG95 Series Hardware Design VDD_EXT 29 GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67–74, 79–82, 89–91, 100–106 PO module’s RF part Vmin = 3.3 V Vnorm = 3.8 V Provide 1.8 V for external circuit Vnorm = 1.8 V IOmax = 50 mA with sufficient current up to 1.8 A in a burst transmission. Power supply for external GPIO’s pull up circuits. If unused, keep it open. Ground Power-on/off Pin Name PWRKEY Pin No.
LTE Standard Module Series EG95 Series Hardware Design USB_DP 9 IO USB_DM 10 IO USB 2.0 Compliant. Require differential USB 2.0 Compliant. impedance of 90 Ω. Require differential impedance of 90 Ω. USB differential data bus (+) USB differential data bus (-) (U)SIM Interfaces Pin Name Pin No. USIM_GND 47 I/O Description DC Characteristics Comment Specified ground for (U)SIM card IOmax = 50 mA USIM1_VDD 43 PO Power supply for (U)SIM card For 1.8 V (U)SIM: Vmax = 1.9 V Vmin = 1.
LTE Standard Module Series EG95 Series Hardware Design USIM1_RST USIM1_ PRESENCE 44 42 DO DI Reset signal of (U)SIM card (U)SIM card insertion detection For 1.8 V (U)SIM: VOLmax = 0.45 V VOHmin = 1.35 V For 3.0 V (U)SIM: VOLmax = 0.45 V VOHmin = 2.55 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V For 1.8 V (U)SIM: Vmax = 1.9 V Vmin = 1.
LTE Standard Module Series EG95 Series Hardware Design USIM2_ PRESENCE 83 DI (U)SIM card insertion detection VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. I/O Description DC Characteristics Comment DO Ring indicator VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep it open. DO Data carrier detection VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep it open. Clear to send VOLmax = 0.
LTE Standard Module Series EG95 Series Hardware Design VIHmax = 2.0V PCM Interface Pin Name Description DC Characteristics Comment PCM data input VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. If unused, keep it open. PCM data output VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep it open. PCM data frame synchronization signal VOLmax = 0.45 V VOHmin = 1.35 V VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain.
LTE Standard Module Series EG95 Series Hardware Design converter SPI Interface 1) Pin Name I/O Description DC Characteristics Comment DO Clock signal of SPI interface VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep it open. DO Master output slave input of SPI interface VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. If unused, keep it open. 28 DI Master input slave output of SPI interface VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.
LTE Standard Module Series EG95 Series Hardware Design USB_BOOT 75 DI Force the module to enter emergency download mode VILmin = -0.3 V VILmax = 0.6 V VIHmin = 1.2 V VIHmax = 2.0 V 1.8 V power domain. It is recommended to reserve the test points. I/O Description DC Characteristics Comment RESERVED Pins Pin Name NC RESERVED Pin No. 1,2, 11–14, 16, 51, 57, 63–66, 76–78, 88, 92–99 18, 25, 56 NC Keep these pins unconnected. Reserved Keep these pins unconnected.
LTE Standard Module Series EG95 Series Hardware Design During this mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally. Power Down Mode In this mode, the power management unit shuts down the power supply. Softwar goes inactive. The serial interface is not accessible. Operating voltage (connected to VBAT_RF and VBAT_BB) remains applied. 3.5. Power Saving 3.5.1.
LTE Standard Module Series EG95 Series Hardware Design 3.5.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions must be met to let the module enter sleep mode. • • • Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The host’s USB bus, which is connected with the module’s USB interface, enters suspend state.
LTE Standard Module Series EG95 Series Hardware Design Module Host VDD USB_VBUS USB_DP USB_DP USB_DM USB_DM AP_READY GPIO RI EINT GND GND Figure 5: Sleep Mode Application with RI • • Sending data to EG95 via USB will wake up the module. When module has a URC to report, RI signal will wake up the host. 3.5.1.4.
LTE Standard Module Series EG95 Series Hardware Design NOTE Please pay attention to the level match shown in dotted line between the module and the host. Please refer to document [1] for more details about EG95 power management application. 3.5.2. Airplane Mode When the module enters airplane mode, the RF function will be disabled, and all AT commands related to it will be inaccessible. This mode can be set via the following ways.
LTE Standard Module Series EG95 Series Hardware Design VBAT_BB 32, 33 Power supply for module’s baseband part. 3.3 3.8 4.3 V GND 3, 31, 48, 50, 54, 55, 58, 59, 61, 62, 67–74, 79–82, 89–91, 100–106 Ground - 0 - V 3.6.2. Decrease Voltage Drop The power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage will never drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2G network.
LTE Standard Module Series EG95 Series Hardware Design VBAT VBAT_RF VBAT_BB + + D1 C1 100 μF C2 100 nF C5 C4 C3 33 pF 10 pF C6 100 μF 100 nF C7 C8 33 pF 10 pF WS4.5D3HV Module Figure 8: Star Structure of Power Supply 3.6.3. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply should be able to provide sufficient current up to 2A at least.
LTE Standard Module Series EG95 Series Hardware Design NOTE In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. 3.6.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Power-on/off Scenarios 3.7.1.
LTE Standard Module Series EG95 Series Hardware Design The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. S1 PWRKEY TVS Close to S1 Figure 11: Turn on the Module by Using Keystroke The power-on scenario is illustrated in the following figure.
LTE Standard Module Series EG95 Series Hardware Design NOTES 1. Please make sure that VBAT is stable before pulling down PWRKEY pin. It is recommended that the time between powering up VBAT and pulling down PWRKEY pin is no less than 30ms. 2. PWRKEY can be pulled down directly to GND with a recommended 10 kΩ resistor if module needs to be powered on automatically and shutdown is not needed. 3.7.2.
LTE Standard Module Series EG95 Series Hardware Design NOTES 1. 2. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. When turning off module with the AT command, please keep PWRKEY at high level after the execution of the command. Otherwise the module will be turned on again after successfully turnoff. 3.8.
LTE Standard Module Series EG95 Series Hardware Design S2 RESET_N TVS Close to S2 Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated in the following figure. VBAT ≤ 460 ms ≥ 150 ms VIH ≥ 1.3 V RESET_N VIL ≤ 0.5 V Module Status Running Resetting Restart Figure 16: Timing of Resetting Module NOTES 1. 2. Use RESET_N only when failed to turn off the module by AT+QPOWD command and PWRKEY pin. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.
LTE Standard Module Series EG95 Series Hardware Design are supported. Table 9: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment Either 1.8 V or 3.0 V is supported by the module automatically.
LTE Standard Module Series EG95 Series Hardware Design VDD_EXT USIM_VDD 51K 15K 100 nF USIM_GND Module USIM_VDD USIM_RST USIM_CLK 0R USIM_PRESENCE 0R USIM_DATA 0R (U)SIM Card Connector VCC RST CLK GND VPP IO GND 33 pF 33 pF 33 pF GND GND Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected.
LTE Standard Module Series EG95 Series Hardware Design close to (U)SIM card connector as possible. If the ground is complete on customers’ PCB, USIM_GND can be connected to PCB ground directly. • • • To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and shield them with surrounded ground. In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic capacitance should not be more than 15 pF.
LTE Standard Module Series EG95 Series Hardware Design Test Points Minimize these stubs Module R3 NM_0R R4 NM_0R MCU VDD ESD Array USB_VBUS L1 USB_DM USB_DM USB_DP USB_DP Close to Module GND GND Figure 19: Reference Circuit of USB Interface A common mode choke L1 is recommended to be added in series between the module and customer’s MCU in order to suppress EMI spurious transmission.
LTE Standard Module Series EG95 Series Hardware Design • The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps, 460800 bps, 921600 bps and 3000000 bps baud rates, and the default is 115200 bps. It supports RTS and CTS hardware flow control, and is used for AT command communication and data transmission. • The debug UART interface supports 115200 bps baud rate. It is used for Linux console and log output.
LTE Standard Module Series EG95 Series Hardware Design VIH 1.2 EG95_Series_Hardware_Design 2.
LTE Standard Module Series EG95 Series Hardware Design VOL 0 0.45 V VOH 1.35 1.8 V The module provides 1.8 V UART interfaces. A level translator should be used if customers’ application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is recommended. The following figure shows a reference design. 0.1 μF 10K VDD_EXT VCCA VCCB VDD_MCU 0.
LTE Standard Module Series EG95 Series Hardware Design 3.12. PCM and I2C Interfaces EG95 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following modes and one I2C interface: • • Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge.
LTE Standard Module Series EG95 Series Hardware Design 125 μs PCM_CLK 1 31 2 32 PCM_SYNC MSB LSB MSB LSB PCM_DOUT PCM_DIN Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_DIN 6 DI PCM data input 1.8 V power domain PCM_DOUT 7 DO PCM data output 1.
LTE Standard Module Series EG95 Series Hardware Design PCM_CLK BCLK PCM_SYNC LRCK PCM_DOUT DAC PCM_DIN ADC I2C_SCL SCL I2C_SDA SDA INP INN BIAS MICBIAS Module 4.7K 4.7K LOUTP LOUTN Codec 1.8 V Figure 24: Reference Circuit of PCM and I2C Application with Audio Codec NOTES 1. 2. It is recommended to reserve an RC (R = 22 Ω, C = 22 pF) circuit on the PCM lines, especially for PCM_CLK. EG95 works as a master device pertaining to I2C interface. 3.13.
LTE Standard Module Series EG95 Series Hardware Design SPI_MISO 28 Master input slave output of SPI interface DI 1.8 V power domain The following figure shows a reference design of SPI interface with peripherals. SPI_CLK SPI_CLK SPI_MOSI SPI_MOSI SPI_MISO SPI_MISO Module Peripherals Figure 25: Reference Circuit of SPI Interface with Peripherals NOTE The module provides 1.8 V SPI interface.
LTE Standard Module Series EG95 Series Hardware Design Flicker quickly (125 ms High/125 ms Low) Data transfer is ongoing Always High Voice calling A reference circuit is shown in the following figure. VBAT Module 2.2K 4.7K NETLIGHT 47K Figure 26: Reference Circuit of Network Status Indicator 3.15. STATUS The STATUS pin is set as the module’s operation status indicator. It will output high level when the module is powered on. The following table describes the pin definition of STATUS.
LTE Standard Module Series EG95 Series Hardware Design 3.16. ADC Interface The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 command can be used to read the voltage value on ADC0 pin. For more details about the command, please refer to document [2]. In order to improve the accuracy of ADC voltage values, the traces of ADC should be surrounded by ground. Table 19: Pin Definition of ADC Interface Pin Name Pin No.
LTE Standard Module Series EG95 Series Hardware Design NOTE URC can be outputted from UART port, USB AT port and USB modem port through configuration via AT+QURCCFG command. The default port is USB AT port. The default behaviors of the RI are shown as below, and can be changed by AT+QCFG="urc/ri/ring" command. Please refer to document [2] for details. Table 21: Default Behaviors of RI State Response Idle RI keeps at high level URC RI outputs 120ms low pulse when a new URC returns 3.18.
LTE Standard Module Series EG95 Series Hardware Design Module VDD_EXT Test points USB_BOOT 4.7K Close to test points TVS Figure 28: Reference Circuit of USB_BOOT Interface NOTE 1 VBAT ≥ 500 ms VH = 0.8 V PWRKEY VIL≤ 0.5 V About 100 ms VDD_EXT USB_BOOT can be pulled up to 1.8 V before VDD_EXT Is powered up, and the module will enter emerge ncy download mode wh en i t is powered on. USB_BOOT RESET_N Figure 29: Timing Sequence for Entering Emergency Download Mode NOTES 1. 2.
LTE Standard Module Series EG95 Series Hardware Design 4 GNSS Receiver 4.1. General Description EG95 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS). EG95 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1 Hz data update rate via USB interface by default. By default, EG95 GNSS engine is switched off. It has to be switched on via AT command.
LTE Standard Module Series EG95 Series Hardware Design Accuracy (GNSS) @ open sky XTRA enabled 3.4 s CEP-50 Autonomous @ open sky <2.5 m NOTES 1. 2. 3. Tracking sensitivity: the minimum GNSS signal power at which the module can maintain lock (keep positioning for at least 3 minutes continuously). Reacquisition sensitivity: the minimum GNSS signal power required for the module to maintain lock within 3 minutes after loss of lock.
LTE Standard Module Series EG95 Series Hardware Design 5 Antenna Interfaces EG95 antenna interfaces include a main antenna interface and an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface which is only supported on EG95-NA/-EX/-NAX/-AUX. The impedance of the antenna ports is 50 Ω. 5.1. Main/Rx-diversity Antenna Interfaces 5.1.1.
LTE Standard Module Series EG95 Series Hardware Design WCDMA B1 1920–1980 2110–2170 MHz WCDMA B2 1850–1910 1930–1990 MHz WCDMA B4 1710–1755 2110–2155 MHz WCDMA B5 824–849 869–894 MHz WCDMA B8 880–915 925–960 MHz LTE-FDD B1 1920–1980 2110–2170 MHz LTE-FDD B2 1850–1910 1930–1990 MHz LTE-FDD B3 1710–1785 1805–1880 MHz LTE-FDD B4 1710–1755 2110–2155 MHz LTE-FDD B5 824–849 869–894 MHz LTE-FDD B7 2500–2570 2620–2690 MHz LTE-FDD B8 880–915 925–960 MHz LTE-FDD B12 6
LTE Standard Module Series EG95 Series Hardware Design Main antenna Module R1 0R ANT_MAIN C1 C2 NM NM Diversity antenna R2 0R ANT_DIV C3 C4 NM NM Figure 30: Reference Circuit of RF Antenna Interface NOTES 1. 2. 3. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the receiving sensitivity. ANT_DIV function is enabled by default. AT+QCFG="divctl",0 command can be used to disable receive diversity. Please refer to document [2] for details.
LTE Standard Module Series EG95 Series Hardware Design Figure 32: Coplanar Waveguide Design on a 2-layer PCB Figure 33: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) EG95_Series_Hardware_Design 63 / 99
LTE Standard Module Series EG95 Series Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: • Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. • The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.
LTE Standard Module Series EG95 Series Hardware Design QZSS 1575.42 MHz A reference design of GNSS antenna is shown as below. VDD 0.1 μF 10R Module GNSS Antenna 47 nH 100 pF 0R ANT_GNSS NM NM Figure 35: Reference Circuit of GNSS Antenna NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3. Antenna Installation 5.3.1.
LTE Standard Module Series EG95 Series Hardware Design Active antenna embedded LNA gain: < 17 dB GSM/WCDMA/LTE VSWR: ≤ 2 Efficiency: > 30% Max input power: 50 W Input impedance: 50 Ω Cable insertion loss: < 1 dB (GSM850,EGSM900, WCDMA B5/B8, LTE-FDD B5/B8/B12/B13/B20/B26/B28) Cable insertion loss: < 1.
LTE Standard Module Series EG95 Series Hardware Design U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 37: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 38: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
LTE Standard Module Series EG95 Series Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 29: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 1.8 A Voltage at Digital Pins -0.3 2.3 V 6.2.
LTE Standard Module Series EG95 Series Hardware Design IVBAT USB_VBUS Voltage drop during Maximum power control burst transmission Peak supply current level on EGSM900 (during transmission slot) Maximum power control level on EGSM900 USB connection detection 3.0 400 mV 1.8 2.0 A 5.0 5.25 V 6.3. Operation and Storage Temperatures The operation and storage temperatures are listed in the following table. Table 31: Operation and Storage Temperatures Parameter Min. Typ. Max.
LTE Standard Module Series EG95 Series Hardware Design 6.4. Current Consumption The values of current consumption are shown below. Table 32: EG95-E Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 15 μA AT+CFUN=0 (USB disconnected) 1.3 mA GSM DRX = 2 (USB disconnected) 2.3 mA GSM DRX = 5 (USB suspended) 2.0 mA GSM DRX = 9 (USB disconnected) 1.6 mA WCDMA PF = 64 (USB disconnected) 1.8 mA WCDMA PF = 64 (USB suspended) 2.
LTE Standard Module Series EG95 Series Hardware Design EDGE data transfer WCDMA data transfer LTE data transfer GSM voice call EGSM900 1DL/4UL @ 29.45 dBm 631 mA DCS1800 4DL/1UL @ 29.14 dBm 177 mA DCS1800 3DL/2UL @ 29.07 dBm 290 mA DCS1800 2DL/3UL @ 28.97 dBm 406 mA DCS1800 1DL/4UL @ 28.88 dBm 517 mA EGSM900 4DL/1UL PCL = 8 @ 26.88 dBm 167 mA EGSM900 3DL/2UL PCL = 8 @ 26.84 dBm 278 mA EGSM900 2DL/3UL PCL = 8 @ 26.76 dBm 385 mA EGSM900 1DL/4UL PCL = 8 @ 26.
LTE Standard Module Series EG95 Series Hardware Design WCDMA voice call WCDMA B1 @ 22.91 dBm 632 mA WCDMA B8 @ 23.14 dBm 546 mA Table 33: EG95-NA Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 13 μA AT+CFUN=0 (USB disconnected) 1.0 mA WCDMA PF = 64 (USB disconnected) 2.2 mA WCDMA PF = 64 (USB suspended) 2.5 mA WCDMA PF = 512 (USB disconnected) 1.4 mA LTE-FDD PF = 64 (USB disconnected) 2.6 mA LTE-FDD PF = 64 (USB suspended) 2.
LTE Standard Module Series EG95 Series Hardware Design WCDMA LTE-FDD B5 CH2525 @ 23.39 dBm 601 mA LTE-FDD B12 CH5060 @ 23.16 dBm 650 mA LTE-FDD B13 CH5230 @ 23.36 dBm 602 mA WCDMA B2 CH9938 @ 23.34 dBm 627 mA WCDMA B4 CH1537 @ 23.47 dBm 591 mA WCDMA B5 CH4357 @ 23.37 dBm 536 mA voice call Table 34: EG95-EX Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 15 μA AT+CFUN=0 (USB disconnected) 1.3 mA GSM DRX = 2 (USB disconnected) 2.
LTE Standard Module Series EG95 Series Hardware Design GPRS data transfer EDGE data transfer WCDMA data transfer LTE data transfer LTE-FDD PF = 64 (USB connected) 31.0 mA EGSM900 4DL/1UL @ 33.06 dBm 247.9 mA EGSM900 3DL/2UL @ 32.93 dBm 450.8 mA EGSM900 2DL/3UL @ 31.1 dBm 536.4 mA EGSM900 1DL/4UL @ 29.78 dBm 618 mA DCS1800 4DL/1UL @ 29.3 dBm 144 mA DCS1800 3DL/2UL @ 29.3 dBm 253.4 mA DCS1800 2DL/3UL @ 29.21 dBm 355.4 mA DCS1800 1DL/4UL @ 29.07 dBm 455.
LTE Standard Module Series EG95 Series Hardware Design GSM voice call WCDMA voice call LTE-FDD B20 @ 23.21 dBm 646 mA LTE-FDD B28 @ 22.76 dBm 661 mA EGSM900 PCL = 5 @ 32.36 dBm 259 mA DCS1800 PCL = 0 @ 29.5 dBm 149 mA WCDMA B1 @ 23.4 dBm 494 mA WCDMA B8 @ 23.6 dBm 608 mA Table 35: EG95-NAX Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 11 μA AT+CFUN=0 (USB disconnected) 1.1 mA WCDMA PF = 64 (USB disconnected) 2.
LTE Standard Module Series EG95 Series Hardware Design LTE data WCDMA B5 HSDPA @ 22.39 dBm 502 mA WCDMA B5 HSUPA @ 22.12 dBm 509 mA LTE-FDD B2 @ 23.07 dBm 691 mA LTE-FDD B4 @ 23.09 dBm 713 mA LTE-FDD B5 @ 23.31 dBm 580 mA LTE-FDD B12 @ 23.30 dBm 627 mA LTE-FDD B13 @ 23.32 dBm 619 mA LTE-FDD B25 @ 23.03 dBm 693 mA LTE-FDD B26 @ 22.97 dBm 628 mA WCDMA B2 @ 22.89 dBm 591 mA WCDMA B4 @ 22.76 dBm 577 mA WCDMA B5 @ 23.
LTE Standard Module Series EG95 Series Hardware Design LTE-FDD PF = 64 (USB suspend) EG95_Series_Hardware_Design 2.
LTE Standard Module Series EG95 Series Hardware Design LTE-FDD PF = 256 (USB disconnected) 1.5 mA GSM DRX = 5 (USB disconnected) 18 mA GSM DRX = 5 (USB connected) 28 mA WCDMA PF = 64 (USB disconnected) 18 mA WCDMA PF = 64 (USB connected) 28 mA LTE-FDD PF = 64 (USB disconnected) 18 mA LTE-FDD PF = 64 (USB connected) 29 mA GSM850 4DL/1UL @ 32.48 dBm 217.9 mA GSM850 3DL/2UL @ 31.89dBm 372.3 mA GSM850 2DL/3UL @ 29.45 dBm 432.9 mA GSM850 1DL/4UL @ 28.31 dBm 513.
LTE Standard Module Series EG95 Series Hardware Design WCDMA data transfer LTE data GSM850 2DL/3UL PCL = 8 @ 23.26 dBm 410.2 mA GSM850 1DL/4UL PCL = 8 @ 22.01 dBm 520.5 mA EGSM900 4DL/1UL PCL = 8 @ 26.04 dBm 161.5 mA EGSM900 3DL/2UL PCL = 8 @ 25.86 dBm 294.6 mA EGSM900 2DL/3UL PCL = 8 @ 23.62 dBm 411.4 mA EGSM900 1DL/4UL PCL = 8 @ 22.27 dBm 520.8 mA DCS1800 4DL/1UL PCL = 2 @ 26.12 dBm 139.4 mA DCS1800 3DL/2UL PCL = 2 @ 25.02 dBm 250.7 mA DCS1800 2DL/3UL PCL = 2 @ 22.75 dBm 355.
LTE Standard Module Series EG95 Series Hardware Design GSM voice call WCDMA voice call LTE-FDD B4 @ 22.83 dBm 704.6 mA LTE-FDD B5 @ 23.05 dBm 657.1 mA LTE-FDD B7 @ 22.71 dBm 765.3 mA LTE-FDD B8 @ 22.80 dBm 635.3 mA LTE-FDD B28 @ 22.84 dBm 670.0 mA LTE-FDD B66 @ 22.73 dBm 725.9 mA GSM850 PCL5 @32.57dBm 227.8 mA EGSM900 PCL5 @33.21dBm 253.8 mA DCS1800 PCL0 @30.24dBm 168.0 mA PCS1900 PCL0 @30.33dBm 166.8 mA WCDMA B1 @22.93dBm 656.2 mA WCDMA B2 @22.95dBm 579.
LTE Standard Module Series EG95 Series Hardware Design 6.5. RF Output Power The following table shows the RF output power of EG95 module. Table 38: RF Output Power Frequency Max. Min.
LTE Standard Module Series EG95 Series Hardware Design LTE-FDD B1 (10 MHz) -97.5 dBm -98.3 dBm -101.4 dBm -96.3 dBm LTE-FDD B3 (10 MHz) -98.3 dBm -98.5 dBm -101.5 dBm -93.3 dBm LTE-FDD B7 (10 MHz) -96.3 dBm -98.4 dBm -101.3 dBm -94.3 dBm LTE-FDD B8 (10 MHz) -97.1 dBm -99.1 dBm -101.2 dBm -93.3 dBm LTE-FDD B20 (10 MHz) -97 dBm -99 dBm -101.3 dBm -93.3 dBm LTE-FDD B28A (10 MHz) -98.3 dBm -99 dBm -101.4 dBm -94.
LTE Standard Module Series EG95 Series Hardware Design LTE-FDD B3 (10 MHz) -98.3 dBm -99.5 dBm -102.5 dBm -93.3 dBm LTE-FDD B7 (10 MHz) -97.5 dBm -98.4 dBm -100.3 dBm -94.3 dBm LTE-FDD B8 (10 MHz) -98.7 dBm -99.6 dBm -102.2 dBm -93.3 dBm LTE-FDD B20 (10 MHz) -97 dBm -97.5 dBm -102.2 dBm -93.3 dBm LTE-FDD B28 (10 MHz) -98.2 dBm -99.5 dBm -102 dBm -94.
LTE Standard Module Series EG95 Series Hardware Design WCDMA B1 -109.2 dBm -109.5 dBm NA -106.7 dBm WCDMA B2 -109.8 dBm -111 dBm NA -104.7 dBm WCDMA B5 -110 dBm -111 dBm NA -104.7 dBm WCDMA B8 -110 dBm -111 dBm NA -103.7 dBm LTE-FDD B1 (10MHz) -97.2dBm -98.9dBm -101.2dBm -96.3dBm LTE-FDD B2 (10MHz) -97.7dBm -98.9dBm -101.7dBm -94.3dBm LTE-FDD B3 (10MHz) -98.2dBm -99.1dBm -102.2dBm -93.3dBm LTE-FDD B4 (10MHz) -97.7dBm -98.7dBm -101.2dBm -96.
LTE Standard Module Series EG95 Series Hardware Design 6.8. Thermal Consideration In order to achieve better performance of the module, it is recommended to comply with the following principles for thermal consideration: • On customers’ PCB design, please keep placement of the module away from heating sources, especially high power components such as ARM processor, audio power amplifier, power supply, etc.
LTE Standard Module Series EG95 Series Hardware Design Thermal Pad EC20 R2.1 Module Thermal Pad Heatsink Heatsink Application Board Shielding Cover Application Board Figure 40: Referenced Heatsink Design (Heatsink at the Backside of Customers’ PCB) NOTE The module offers the best performance when the internal BB chip stays below 105°C.
LTE Standard Module Series EG95 Series Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm, and the dimensional tolerances are ±0.05 mm unless otherwise specified. 7.1. Mechanical Dimensions of the Module 25±0.15 2.30±0.2 29±0.
LTE Standard Module Series EG95 Series Hardware Design Figure 42: Module Bottom Dimensions (Top View) NOTE The package warpage level of the module conforms to the JEITA ED-7306 standard.
LTE Standard Module Series EG95 Series Hardware Design 7.2. Recommended Footprint Figure 43: Recommended Footprint (Top View) NOTE For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB.
LTE Standard Module Series EG95 Series Hardware Design 7.3. Top and Bottom Views of the Module Figure 44: Top View of the Module Figure 45: Bottom View of the Module NOTE These are renderings of the module. For authentic appearance, please refer to the module received from Quectel.
LTE Standard Module Series EG95 Series Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35%–60%. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3.
LTE Standard Module Series EG95 Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60%, It is recommended to start the solder reflow process within 24 hours after the package is removed.
LTE Standard Module Series EG95 Series Hardware Design Table 45: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone Max slope 1–3 °C/s Soak time (between A and B: 150 °C and 200 °C) 70–120 s Reflow Zone Max slope 2–3 °C/s Reflow time (D: over 220°C) 45–70 s Max temperature 238 °C to 246 °C Cooling down slope -1.5 to -3 °C/s Reflow Cycle Max reflow cycle 1 8.3. Packaging EG95 is packaged in a vacuum-sealed bag which is ESD protected.
LTE Standard Module Series EG95 Series Hardware Design Figure 47: Tape Specifications 48.5 Cover tape 13 100 Direction of feed 44.5+0.20 -0.
LTE Standard Module Series EG95 Series Hardware Design 1083 Carrier tape unfolding Carrier tape packing module Figure 49: Tape and Reel Directions EG95_Series_Hardware_Design 95 / 99
LTE Standard Module Series EG95 Series Hardware Design 9 Appendix A References Table 46: Related Documents SN Document Name Remark [1] Quectel_EC2x&EG9x_Power_Management_ Application_Note Power management application note for EC25 series, EC21 series, EC20 R2.
LTE Standard Module Series EG95 Series Hardware Design DFOTA Delta Firmware Upgrade Over The Air DL Downlink DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System GMSK Gaussian Minimum Shift Keying GNSS Global Navigation Satellite System GPS Global Positioning System GSM Global System f
LTE Standard Module Series EG95 Series Hardware Design MSL Moisture Sensitivity Level MT Mobile Terminated PAP Password Authentication Protocol PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized Rx Receive SMS Short Message Service TDD Time Division Duplexing TX Transmitting Direction UL Uplink UMTS Universal Mobile Telecommu
LTE Standard Module Series EG95 Series Hardware Design VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access EG95_Series_Hardware_Design 99 / 99
LTE Standard Module Series EG95 Series Hardware Design 10 Appendix B GPRS Coding Schemes Table 48: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
LTE Standard Module Series EG95 Series Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
LTE Standard Module Series EG95 Series Hardware Design 14 4 4 NA 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 EG95_Series_Hardware_Design 102 / 99
LTE Standard Module Series EG95 Series Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 50: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot MCS-1 GMSK C 8.80 kbps 17.60 kbps 35.20 kbps MCS-2 GMSK B 11.2 kbps 22.4 kbps 44.8 kbps MCS-3 GMSK A 14.8 kbps 29.6 kbps 59.2 kbps MCS-4 GMSK C 17.6 kbps 35.2 kbps 70.4 kbps MCS-5 8-PSK B 22.4 kbps 44.8 kbps 89.6 kbps MCS-6 8-PSK A 29.6 kbps 59.