Product Info

LTE Standard Module Series
EG91 Series Hardware Design
EG91_Series_Hardware_Design
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• The main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps,
230400bps, 460800bps, 921600bps and 3000000bps baud rates, and the default is 115200bps. It
supports RTS and CTS hardware flow control, and is used for AT command communication only.
• The debug UART interface supports 115200bps baud rate. It is used for Linux console and log
output.
The following tables show the pin definition of the two UART interfaces.
Table 11: Pin Definition of Main UART Interfaces
Pin Name Pin No. I/O Description Comment
RI
DCD
39
38
DO
DO
Ring indicator
Data carrier detection
CTS
36
DO
Clear to send
RTS
37
DI
Request to send
1.8V power domain
DTR
30
DI
Sleep mode control
TXD
35
DO
Transmit data
RXD
34
DI
Receive data
Table 12: Pin Definition of Debug UART Interface
Pin Name
Pin No.
I/O
Description
Comment
DBG_TXD
23
DO
Transmit data
1.8V power domain
DBG_RXD
22
DI
Receive data
1.8V power domain
The logic levels are described in the following table.
Table 13: Logic Levels of Digital I/O
Parameter
Min.
Max.
Unit
V
IL
-0.3
0.6
V