Product Info

Wi-Fi&BT Module Series
AF50T Hardware Design
AF50T_Hardware_Design 21 / 52
3.5.1. WLAN_EN
WLAN_EN is used to control the WLAN function of AF50T module. WLAN function will be enabled when
WLAN_EN is at high level.
Table 5: Pin Definition of WLAN_EN
WLAN_EN is a sensitive signal, and it should be ground shielded and be routed as close to AF50T as
possible.
3.5.2. PCIe Interface
The following table shows the pin definition of the PCIe interface of AF50T.
Table 6: Pin Definition of PCIe Interface
The following figure shows the PCIe interface connection between AF50T and AG55xQ series modules.
Pin Name Pin No. I/O Description Comment
WLAN_EN 84 DI WLAN function enable control Active high
Pin Name Pin No. I/O Description Comment
PCIE_REFCLK_P 54 AI PCIe reference clock (+)
Require differential
impedance of 85 Ω.
PCIE_REFCLK_M 9 AI PCIe reference clock (-)
PCIE_TX_P 52 AO PCIe transmit (+)
PCIE_TX_M 7 AO PCIe transmit (-)
PCIE_RX_P 56 AI PCIe receive (+)
PCIE_RX_M 11 AI PCIe receive (-)
PCIE_CLKREQ_
N
12 DO PCIe clock request
1.8 V power domain.
PCIE_RST_N 14 DI PCIe reset
PCIE_WAKE_N 13 DO PCIe wakes up host
NOTE