Product Info

5G Module Series
RM500Q-AE&RM502Q-AE Hardware Design
RM500Q-AE&RM502Q-AE_Hardware_Design 29 / 83
3.6. Reset the Module
RESET_N is an asynchronous and active low signal (1.5 V logic level). Whenever this pin is active, the
module will immediately be placed in a Power On Reset (POR) condition.
CAUTION: Triggering the RESET# signal will lead to loss of all data in the modem and the removal of
system drivers. It will also disconnect the modem from the network.
Table 8: Definition of RESET_N Pin
The module can be reset by pulling down the RESET_N pin for 200–700 ms. An open collector/drain
driver or button can be used to control the RESET_N pin.
Host Module
RESET_N
Reset
Logic
GPIO
67
VDD 1.5 V
Reset pulse
200-700 ms
R1
100k
R3
100k
R2
1k
Q1
NPN
Figure 10: Reference Circuit of RESET_N with NPN Driving Circuit
Pin No.
Pin Name
Description
DC Characteristics
Comment
67
RESET_N
Reset the module
V
IH(max)
= 1.5 V
V
IH(min)
= TBD
V
IL(max)
= TBD
Internally pulled up to 1.5 V
with a 100 kΩ resistor