Product Info

LPWA Module Series
BG600L-M3 Hardware Design
BG600L-M3_Hardware_Design 50 / 83
The following figure shows the timing of USB_BOOT.
V
IL
≤ 0.45 V
VBAT
PWRKEY
500–1000 ms
NOTE
VDD_EXT
About 30 ms
USB_BOOT
Pulling up USB_BOOT to 1.8 V before VDD_EXT power-
up will force the module into emergency download mode
after the module is powered on.
Figure 24: Timing of Turning on Module with USB_BOOT
1. It is recommended to reserve the above circuit design during application design.
2. Please make sure that VBAT is stable before pulling down PWRKEY. It is recommended that the time
between powering up VBAT and pulling down PWRKEY is no less than 30 ms.
3. When using MCU to control the module entering emergency download mode, please follow the above
timing sequence. Connecting the test points as shown in Figure 23 can manually force the module to
enter download mode.
2.17 ADC Interface
The module provides one analog-to-digital converter (ADC) interface. AT+QADC=0 command can be
used to read the voltage value on ADC pin. For more details about the AT command, please refer to
document [2].
In order to improve the accuracy of ADC voltage values, the trace of ADC should be ground surrounded.
NOTES