Product Info

LPWA Module Series
BG600L-M3 Hardware Design
BG600L-M3_Hardware_Design 31 / 83
 Execute AT+QSCLK=1 command to enable sleep mode.
 Drive MAIN_DTR pin high.
The following figure shows the connection between the module and the host.
Figure 3: Sleep Mode Application via UART
 When BG600L-M3 has URC to report, MAIN_RI signal will wake up the host. Please refer to Chapter
3.15 for details about MAIN_RI behavior.
 Driving the MAIN_DTR of host low will wake up the module.
2.5 Power Supply
2.5.1 Power Supply Pins
BG600L-M3 provides the following two VBAT pins for connection with an external power supply. There
are two separate voltage domains for VBAT.
 One VBAT_RF pin for module’s RF part.
 One VBAT_BB pin for module’s baseband part.
The following table shows the details of VBAT pins and ground pins.
Table 6: VBAT and GND Pins
Pin Name Pin No. Description Min. Typ. Max. Unit
VBAT_RF 50
Power supply for the
module’s RF part
3.3 3.8 4.3 V
VBAT_BB 51
Power supply for the
module’s baseband part
3.3 3.8 4.3 V