Product Info

LPWA Module Series
BG600L-M3 Hardware Design
BG600L-M3_Hardware_Design 25 / 83
PCM Interface*
Pin Name Pin No. I/O Description DC Characteristics Comment
PCM_CLK 59 DO
PCM clock
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep this
pin open.
PCM_SYNC 61 DO
PCM data frame
sync
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep this
pin open.
PCM_DIN 62 DI
PCM data input
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.2 V
V
IH
max = 2.0 V
1.8 V power domain.
If unused, keep this
pin open.
PCM_DOUT 60 DO
PCM data output
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep this
pin open.
I2C Interface*
Pin Name Pin No. I/O Description DC Characteristics Comment
I2C_SCL 58 OD
I2C serial clock
(for external codec)
External pull-up
resistor is required.
1.8 V only.
If unused, keep this
pin open.
I2C_SDA 57 OD
I2C serial data
(for external codec)
External pull-up
resistor is required.
1.8 V only.
If unused, keep this
pin open.
Antenna Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
ANT_MAIN 41 IO
Main antenna
interface
50 Ω impedance
ANT_GNSS 15 AI
GNSS antenna
interface
50 Ω impedance.
If unused, keep this
pin open.
GPIO Interfaces*
Pin Name Pin No. I/O Description DC Characteristics
Comment
GPIO1 9 IO General-purpose V
OL
max = 0.45 V BOOT_CONFIG.