Product Info

Smart Module Series
SC600Y&SC600T Hardware Design
SC600Y&SC600T_Hardware_Design 65 / 134
DSI0_LN1_P 119 AO
LCD0 MIPI lane 1 data
signal (+)
DSI0_LN2_N 122 AO
LCD0 MIPI lane 2 data
signal (-)
DSI0_LN2_P 121 AO
LCD0 MIPI lane 2 data
signal (+)
DSI0_LN3_N 124 AO
LCD0 MIPI lane 3 data
signal (-)
DSI0_LN3_P 123 AO
LCD0 MIPI lane 3 data
signal (+)
DSI1_CLK_N 103 AO LCD1 MIPI clock signal (-)
DSI1_CLK_P 102 AO LCD1 MIPI clock signal (+)
DSI1_LN0_N 105 AO
LCD1 MIPI lane 0 data
signal (-)
DSI1_LN0_P 104 AO
LCD1 MIPI lane 0 data
signal (+)
DSI1_LN1_N 107 AO
LCD1 MIPI lane 1 data
signal (-)
DSI1_LN1_P 106 AO
LCD1 MIPI lane 1 data
signal (+)
DSI1_LN2_N 109 AO
LCD1 MIPI lane 2 data
signal (-)
DSI1_LN2_P 108 AO
LCD1 MIPI lane 2 data
signal (+)
DSI1_LN3_N 111 AO
LCD1 MIPI lane 3 data
signal (-)
DSI1_LN3_P 110 AO
LCD1 MIPI lane 3 data
signal (+)