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Smart LTE Module Series
SC20 Hardware Design
SC20_Hardware_Design 67 / 130
3.22.3. Reference Circuit Design for Headphone Interface
NM
0R
20K
ESD
MIC_GND
MIC2P
HPH_L
HS_DET
HPH_R
HPH_GND
33pF
0R
Module
C1
NM
C2
R1
R2
0R
R3
R4
0R
3
6
4
5
2
1
33pF 33pF
C3
C4 C5
F3
F2
F1
D1 D2 D3
D4
0R
0R
0R
F4
Figure 28: Reference Circuit Design for Headphone Interface
3.22.4. Reference Circuit Design for Loudspeaker Interface
EARP
EARN
F2
SPKP
SPKN
0R
0R
33pF
33pF
C1 C2
F1
Module
D1 D2
Figure 29: Reference Circuit Design for Loudspeaker Interface
3.22.5. Audio Interfaces Design Considerations
It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10pF and 33pF) for
filtering out RF interference, thus reducing TDD noise. The 33pF capacitor is applied for filtering out RF